ISD4004
PIN NAME
PIN #
FUNCTION
SOIC /
PDIP
ANA IN-
16
Inverting Analog Input: This pin transfers the signal into the device during
recording via differential-input mode.
In this differential-input mode, a 16 mVp-p maximum input signal should be
capacitively coupled to ANA IN- for optimal signal quality, as shown in Figure
1: ANA IN Modes. This capacitor value should be equal to that used on ANA
IN+ pin. The input impedance at ANA IN- is normally 56 KΩ.
In the single-ended mode, ANA IN- should be capacitively coupled to VSSA
through a capacitor equal to that used on the ANA IN+ pin.
ANA IN+
17
Non-Inverting Analog Input: This pin is the non-inverting analog input that
transfers the signal to the device for recording. The analog input amplifier
can be driven single ended or differentially.
In the single-ended input mode, a 32 mVp-p (peak-to-peak) maximum signal
should be capacitively connected to this pin for optimal signal quality. The
external capacitor associated with ANA IN+ together with the 3 KΩ input
impedance are selected to give cutoff at the low frequency end of the voice
passband.
In the differential-input mode, the maximum input signal at ANA IN+ should
be 16 mVp-p capacitively coupled for optimal signal quality. The circuit
connections for the two modes are shown in Figure 1.
VCCA / VCCD
18 / 27 Supply Voltage: To minimize noises, the analog and digital circuits in the
ISD4004 devices use separate power busses. These +3V busses are
brought out to separate pins and should be tied together as close to the
supply as possible. In addition, these supplies should be decoupled as close
to the package as possible.
RAC
24
Row Address Clock: This is an open drain output that provides the signal
of a ROW with a 200 ms period for 8 KHz sampling frequency. (This
represents a single row of memory.) This signal stays HIGH for 175 ms and
stays LOW for 25 ms when it reaches the end of a row.
The RAC pin stays HIGH for 109.37 µsec and stays LOW for 15.63 µsec in
Message Cueing mode (see Message Cueing section for detailed
description). Refer to the AC Parameters table for RAC timing information
at other sample rates.
When a record command is first initiated, the RAC pin remains HIGH for an
extra TRACL period. This is due to the need of loading the internal sample
and hold circuits in the device. This pin can be used for message
management techniques.
A pull-up resistor is required to connect this pin to other device.
25
Interrupt: This is an open drain output pin. This pin goes LOW and stays
LOW when an Overflow (OVF) or End of Message (EOM) marker is
detected. Each operation that ends with an EOM or OVF will generate an
interrupt. The interrupt will be cleared the next time an SPI cycle is initiated.
The interrupt status can also be read by an RINT instruction.
INT
A pull-up resistor is required to connect this pin to other device.
Overflow Flag (OVF) – The Overflow flag indicates that the end of memory
has been reached during a record or playback operation.
End of Message (EOM) – The End of Message flag is set only during
playback operation when an EOM is found. There are eight EOM flag
position options per row.
Jun 28, 2021
Page 7 of 34
Rev1.5