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IS49RL36160-125FBLI PDF预览

IS49RL36160-125FBLI

更新时间: 2024-02-10 02:10:19
品牌 Logo 应用领域
美国芯成 - ISSI 动态存储器双倍数据速率内存集成电路
页数 文件大小 规格书
115页 3759K
描述
DDR DRAM, 16MX36, CMOS, PBGA168, 13.50 X 13.50 MM, 1.25 MM HEIGHT, LEAD FREE, MO-205, FCBGA-168

IS49RL36160-125FBLI 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:LBGA,Reach Compliance Code:compliant
风险等级:5.66访问模式:MULTI BANK PAGE BURST
其他特性:AUTO/SELF REFRESHJESD-30 代码:S-PBGA-B168
长度:13.5 mm内存密度:603979776 bit
内存集成电路类型:DDR DRAM内存宽度:36
功能数量:1端口数量:1
端子数量:168字数:16777216 words
字数代码:16000000工作模式:SYNCHRONOUS
组织:16MX36封装主体材料:PLASTIC/EPOXY
封装代码:LBGA封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE座面最大高度:1.25 mm
自我刷新:YES最大供电电压 (Vsup):1.42 V
最小供电电压 (Vsup):1.28 V标称供电电压 (Vsup):1.35 V
表面贴装:YES技术:CMOS
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM宽度:13.5 mm
Base Number Matches:1

IS49RL36160-125FBLI 数据手册

 浏览型号IS49RL36160-125FBLI的Datasheet PDF文件第2页浏览型号IS49RL36160-125FBLI的Datasheet PDF文件第3页浏览型号IS49RL36160-125FBLI的Datasheet PDF文件第4页浏览型号IS49RL36160-125FBLI的Datasheet PDF文件第5页浏览型号IS49RL36160-125FBLI的Datasheet PDF文件第6页浏览型号IS49RL36160-125FBLI的Datasheet PDF文件第7页 
576Mb: x18, x36 RLDRAM 3  
Features  
RLDRAM 3  
IS49RL18320– 2 Meg x 18 x 16 Banks  
IS49RL36160– 1 Meg x 36 x 16 Banks  
Options  
Features  
Clock cycle and tRC timing  
– 0.93ns and tRC (MIN) = 8ns  
(RL3-2133)  
1066 MHz DDR operation (2133 Mb/s/ball data  
rate)  
76.8 Gb/s peak bandwidth (x36 at 1066 MHz clock  
frequency)  
Organization  
– 32 Meg x 18, and 16 Meg x 36 common I/O (CIO)  
– 16 banks  
1.2V center-terminated push/pull I/O  
– 0.93ns and tRC (MIN) = 10ns  
(RL3-2133)  
– 1.07ns and tRC (MIN) = 8ns  
(RL3-1866)  
– 1.07ns and tRC (MIN) = 10ns  
(RL3-1866)  
2.5V V EXT , 1.35V V DD , 1.2V V  
I/O  
– 1.25ns and tRC (MIN) = 8ns  
(RL3-1600)  
DDQ  
Reduced cycle time (tRC (MIN) = 8 - 12ns)  
SDR addressing  
Programmable READ/WRITE latency (RL/WL) and  
burst length  
Data mask for WRITE commands  
– 1.25ns and tRC (MIN) = 10ns  
(RL3-1600)  
– 1.25ns and tRC (MIN) = 12ns  
(RL3-1600)  
Conꢀguration  
-32 Meg x 18  
- 16 Meg x 36  
Operating Temperature  
– Commercial (TC = 0° to +95°C)  
– Industrial (TC = –40°C to +95°C)  
Package  
Fr  
DK x#) and output data clocks (QK x, QK x#)  
x,  
On-die DLL generates CK edge-aligned data and  
64ms refresh (128K refresh per 64ms)  
168-ball FBGA package  
Ω or 60 Ω matched impedance outputs  
– 168-ball FBGA  
– 168-ball FBGA (Pb-free)  
Revision  
Integrated on-die termination (ODT)  
Single or multibank writes  
Extended operating range (200–1066 MHz)  
READ training register  
Multiplexed and non-multiplexed addressing capa-  
bilities  
Mirror function  
Output driver and ODT calibration  
JTAG interface (IEEE 1149.1-2001)  
Copyright © 2013 Integrated Silicon Solu on, Inc. All rights reserved. ISSI reserves the right to make changes to this specica on and its products at any me without  
no ce. ISSI assumes no liability arising out of the applica on or use of any informa on, products or services described herein. Customers are advised to obtain the  
latest version of this device specica on before relying on any published informa on and before placing orders for produs.ct  
Integrated Silicon Solu on, Inc. does not recommend the use of any of its products in life support applica ons where the failure or malfunc on of the product can  
reasonably be expected to cause failure of the life support system or to signicantly aect its safety or eec veness. Products are not authorized for use in such  
applica ons unless Integrated Silicon Solu on, Inc. receives wri en assurance to its sa sfac on, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) poten al liability of Integrated Silicon Solu on, Inc is adequately protected under the circumstances  
RLDRAM® is a registered trademark of Micron Technology, Inc.  
Integrated Silicon Solution, Inc. www.issi.com –  
Rev. 00B, 2/21/2013  

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