5秒后页面跳转
IS42S16100-7TL PDF预览

IS42S16100-7TL

更新时间: 2024-02-08 06:09:49
品牌 Logo 应用领域
美国芯成 - ISSI 存储内存集成电路光电二极管动态存储器时钟
页数 文件大小 规格书
81页 1081K
描述
512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

IS42S16100-7TL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSOP2
包装说明:TSOP2, TSOP50,.46,32针数:50
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.02风险等级:5.56
访问模式:DUAL BANK PAGE BURST最长访问时间:5.5 ns
其他特性:AUTO/SELF REFRESH最大时钟频率 (fCLK):143 MHz
I/O 类型:COMMON交错的突发长度:1,2,4,8
JESD-30 代码:R-PDSO-G50JESD-609代码:e3
长度:20.95 mm内存密度:16777216 bit
内存集成电路类型:SYNCHRONOUS DRAM内存宽度:16
湿度敏感等级:3功能数量:1
端口数量:1端子数量:50
字数:1048576 words字数代码:1000000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:1MX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP50,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified刷新周期:2048
座面最大高度:1.2 mm自我刷新:YES
连续突发长度:1,2,4,8,FP最大待机电流:0.004 A
子类别:DRAMs最大压摆率:0.16 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
处于峰值回流温度下的最长时间:10宽度:10.16 mm
Base Number Matches:1

IS42S16100-7TL 数据手册

 浏览型号IS42S16100-7TL的Datasheet PDF文件第2页浏览型号IS42S16100-7TL的Datasheet PDF文件第3页浏览型号IS42S16100-7TL的Datasheet PDF文件第4页浏览型号IS42S16100-7TL的Datasheet PDF文件第5页浏览型号IS42S16100-7TL的Datasheet PDF文件第6页浏览型号IS42S16100-7TL的Datasheet PDF文件第7页 
IS42S16100  
512K Words x 16 Bits x 2 Banks (16-MBIT)  
SYNCHRONOUS DYNAMIC RAM  
FEBRUARY 2008  
FEATURES  
DESCRIPTION  
• Clock frequency: 200, 166, 143 MHz  
ISSI’s 16Mb Synchronous DRAM IS42S16100 is  
organized as a 524,288-word x 16-bit x 2-bank for  
improved performance. The synchronous DRAMs  
achieve high-speed data transfer using pipeline  
architecture. All inputs and outputs signals refer to the  
rising edge of the clock input.  
• Fully synchronous; all signals referenced to a  
positive clock edge  
• Two banks can be operated simultaneously and  
independently  
• Dual internal bank controlled by A11  
(bank select)  
PIN CONFIGURATIONS  
50-Pin TSOP (Type II)  
• Single 3.3V power supply  
• LVTTL interface  
VDD  
DQ0  
DQ1  
GNDQ  
DQ2  
DQ3  
VDDQ  
DQ4  
DQ5  
GNDQ  
DQ6  
DQ7  
VDDQ  
LDQM  
WE  
1
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
GND  
DQ15  
IDQ14  
GNDQ  
DQ13  
DQ12  
VDDQ  
DQ11  
DQ10  
GNDQ  
DQ9  
DQ8  
VDDQ  
NC  
UDQM  
CLK  
CKE  
NC  
A9  
A8  
A7  
A6  
A5  
• Programmable burst length  
– (1, 2, 4, 8, full page)  
2
3
4
5
• Programmable burst sequence:  
Sequential/Interleave  
6
7
8
• 2048 refresh cycles every 32 ms  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
• Random column address every clock cycle  
• Programmable CAS latency (2, 3 clocks)  
• Burst read/write and burst read/single write  
CAS  
RAS  
CS  
operations capability  
• Burst termination by burst stop and  
A11  
A10  
A0  
A1  
precharge command  
• Byte controlled by LDQM and UDQM  
A2  
A3  
VDD  
• Packages 400-mil 50-pin TSOP-II and 60-ball  
BGA  
A4  
GND  
• Lead-free package option  
• Available in Industrial Temperature  
PIN DESCRIPTIONS  
A0-A11  
A0-A10  
A11  
Address Input  
CAS  
WE  
Column Address Strobe Command  
Row Address Input  
Bank Select Address  
Column Address Input  
Data DQ  
Write Enable  
LDQM Lower Bye, Input/Output Mask  
UDQM Upper Bye, Input/Output Mask  
A0-A7  
DQ0 to DQ15  
CLK  
VDD  
GND  
Power  
System Clock Input  
Clock Enable  
Ground  
CKE  
VDDQ Power Supply for DQ Pin  
GNDQ Ground for DQ Pin  
CS  
Chip Select  
RAS  
Row Address Strobe Command  
NC  
No Connection  
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without  
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the  
latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com  
1
Rev. D  
01/28/08  

与IS42S16100-7TL相关器件

型号 品牌 获取价格 描述 数据表
IS42S16100-7TLI ISSI

获取价格

512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16100-8T ICSI

获取价格

Synchronous DRAM, 1MX16, 6ns, CMOS, PDSO50,
IS42S16100-8TI ICSI

获取价格

Synchronous DRAM, 1MX16, 6ns, CMOS, PDSO50,
IS42S16100A1 ISSI

获取价格

512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16100A-10TI ISSI

获取价格

Synchronous DRAM, 1MX16, 7ns, CMOS, PDSO50, 0.400 INCH, TSOP2-50
IS42S16100A1-10T ISSI

获取价格

512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16100A1-10TI ISSI

获取价格

512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16100A1-10TL ISSI

获取价格

512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16100A1-10TLI ISSI

获取价格

512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S16100A1-6T ISSI

获取价格

512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM