Datasheet > IN74HCT125AN

IN74HCT125AN

更新时间： 2024-01-09 18:57:25

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IKSEMICON		栅
页数	文件大小	规格书
6页	257K
描述
Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS

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IN74HCT125AN 技术参数

IN74HCT125A

AC ELECTRICAL CHARACTERISTICS (V_CC=5.0 V ± 10%, C_L=50pF,Input t_r=t_f=6.0 ns)

Guaranteed Limit

≤85°C ≤125°C

Symbol

Parameter

Unit

25 °C

-55°C

t_PLH, t_PHLMaximum Propagation Delay, Input A to

Output Y (Figures 1 and 3)

t_PLZ, t_PHZMaximum Propagation Delay, Output Enable toY

(Figures 2 and 4)

t_PZL, t_PZHMaximum Propagation Delay, Output Enable toY

(Figures 2 and 4)

t_TLH, t_THLMaximum Output Transition Time, Any Output

(Figures 1 and 3)

C_IN

Maximum Input Capacitance

C_OUT

Maximum Three-State Output Capacitance

(Output in High-Impedance State)

Power Dissipation Capacitance (Per Buffer)

Typical @25°C,V_CC=5.0 V

C_PD

Used to determine the no-load dynamic power

consumption:

P_D=C_PDV_CC²f+I_CCV_CC

Figure 1. Switching Waveforms

Figure 2. Switching Waveforms

Rev. 00

1 2 345 6

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型号	品牌	获取价格	描述	数据表
IN74HCT126A	IKSEMICON	获取价格	Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS
IN74HCT126A	INTEGRAL	获取价格	QUAD 3-STATE NONINVERTING BUFFERS
IN74HCT126AD	INTEGRAL	获取价格	QUAD 3-STATE NONINVERTING BUFFERS
IN74HCT126AD	IKSEMICON	获取价格	Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS
IN74HCT126AN	IKSEMICON	获取价格	Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS
IN74HCT126AN	INTEGRAL	获取价格	QUAD 3-STATE NONINVERTING BUFFERS
IN74HCT132A	IKSEMICON	获取价格	Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High-Performance Silicon-Gate CMOS
IN74HCT132A	INTEGRAL	获取价格	QUAD 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS
IN74HCT132AD	IKSEMICON	获取价格	Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High-Performance Silicon-Gate CMOS
IN74HCT132AD	INTEGRAL	获取价格	QUAD 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS