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ILD615-1 PDF预览

ILD615-1

更新时间: 2024-11-28 22:48:11
品牌 Logo 应用领域
威世 - VISHAY 晶体光电晶体管光电晶体管
页数 文件大小 规格书
11页 165K
描述
Optocoupler, Phototransistor Output (Dual, Quad Channel)

ILD615-1 数据手册

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ILD615/ ILQ615  
Vishay Semiconductors  
VISHAY  
Optocoupler, Phototransistor Output (Dual, Quad Channel)  
Features  
• Identical Channel to Channel Footprint  
Dual Channel  
• Dual and Quad Packages Feature:  
- Reduced Board Space  
1
2
3
4
8
7
6
5
C
E
C
E
A
C
A
- Lower Pin and Parts Count  
- Better Channel to Channel CTR Match  
- Improved Common Mode Rejection  
• Isolation Test Voltage from Double Molded Pack-  
age, 5300 VRMS  
C
• Lead-free component  
• Component in accordance to RoHS 2002/95/EC  
and WEEE 2002/96/EC  
Quad Channel  
1
16  
15  
14  
13  
12  
11  
10  
9
A
C
Agency Approvals  
• UL1577, File No. E52744 System Code H or J,  
Double Protection  
• CSA 93751  
• BSI IEC60950 IEC60965  
2
3
4
5
6
7
8
C
A
E
C
E
C
E
C
E
C
A
C
• DIN EN 60747-5-2 (VDE0884)  
DIN EN 60747-5-5 pending  
Available with Option 1  
A
C
i179052  
both level detection and switching applications. Inter-  
facing with a CMOS logic is enhanced by the guaran-  
teed CTR at IF = 1.0 mA.  
Description  
The ILD615/ ILQ615 are multi-channel phototransis-  
tor optocouplers that use GaAs IRLED emitters and  
high gain NPN phototransistors. These devices are  
constructed using over/under leadframe optical cou-  
pling and double molded insulation technology result-  
ing a withstand test voltage of 7500 VACPEAK and a  
working voltage of 1700 VRMS  
.
The binned min./max. and linear CTR characteristics  
make these devices well suited for DC or AC voltage  
detection. Eliminating the phototransistor base con-  
nection provides added electrical noise immunity from  
the transients found in many industrial control envi-  
ronments.  
Because of guaranteed maximum non-saturated and  
saturated switching characteristics, the ILD615/  
ILQ615 can be used in medium speed data I/O and  
control systems. The binned min./max. CTR specifi-  
cation allow easy worst case interface calculations for  
Document Number 83652  
Rev. 1.3, 19-Apr-04  
www.vishay.com  
1

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