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IDTCSPT857CPAG8 PDF预览

IDTCSPT857CPAG8

更新时间: 2024-11-15 15:34:51
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
15页 148K
描述
PLL Based Clock Driver, 857 Series, 10 True Output(s), 0 Inverted Output(s), PDSO48, GREEN, TSSOP-48

IDTCSPT857CPAG8 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP48,.3,20针数:48
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.3
系列:857输入调节:DIFFERENTIAL
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:12.5 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
最大I(ol):0.012 A湿度敏感等级:1
功能数量:1反相输出次数:
端子数量:48实输出次数:10
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:2.5 V
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.075 ns
座面最大高度:1.1 mm子类别:Clock Drivers
最大供电电压 (Vsup):2.7 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:COMMERCIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:6.1 mm最小 fmax:220 MHz
Base Number Matches:1

IDTCSPT857CPAG8 数据手册

 浏览型号IDTCSPT857CPAG8的Datasheet PDF文件第2页浏览型号IDTCSPT857CPAG8的Datasheet PDF文件第3页浏览型号IDTCSPT857CPAG8的Datasheet PDF文件第4页浏览型号IDTCSPT857CPAG8的Datasheet PDF文件第5页浏览型号IDTCSPT857CPAG8的Datasheet PDF文件第6页浏览型号IDTCSPT857CPAG8的Datasheet PDF文件第7页 
2.5V - 2.6V PHASE LOCKED  
LOOP DIFFERENTIAL 1:10  
SDRAM CLOCK DRIVER  
IDTCSPT857C  
FEATURES:  
DESCRIPTION:  
• 1 to 10 differential clock distribution  
• Optimized for clock distribution in DDR (Double Data Rate)  
SDRAM applications  
TheCSPT857CisaPLLbasedclockdriverthatactsasazerodelaybuffer  
todistributeonedifferentialclockinputpair(CLK,CLK)to10differentialoutput  
pairs(Y[0:9],Y[0:9])andonedifferentialpairoffeedbackclockoutput(FBOUT,  
FBOUT). External feedback pins (FBIN, FBIN) for synchronization of the  
outputs to the input reference is provided. A CMOS Enable/Disable pin is  
available for low power disable. When the input frequency falls below  
approximately20MHz,thedevicewillenterpowerdownmode. Inthismode,  
thereceiversaredisabled,thePLListurnedoff,andtheoutputclockdrivers  
aretristated,resultinginacurrentconsumptionoflessthan200μA.  
TheCSPT857Crequiresnoexternalcomponentsandhasbeenoptimised  
forverylowI/Ophaseerror,skew,andjitter,whilemaintainingfrequencyand  
duty cycleovertheoperatingvoltageandtemperaturerange.TheCSPT857C,  
designedforuseinbothmoduleassembliesandsystemmotherboardbased  
solutions,providesanoptimumhigh-performanceclocksource.  
• Operating frequency: 60MHz to 220MHz  
Very low skew:  
– <100ps for PC1600 - PC2700  
– <75ps for PC3200  
Very low jitter:  
– <75ps for PC1600 - PC2700  
– <50ps for PC3200  
• 2.5V AVDD and 2.5V VDDQ for PC1600-PC2700  
• 2.6V AVDD and 2.6V VDDQ for PC3200  
• CMOS control signal input  
Test mode enables buffers while disabling PLL  
Low current power-down mode  
Tolerant of Spread Spectrum input clock  
Available in 48-pin TSSOP, 40-pin VFQFPN, and 56-pin VFBGA  
packages  
The CSPT857C is available in Commercial Temperature Range (0°C to  
+70°C)andIndustrialTemperatureRange(-40°Cto+85°C). SeeOrdering  
Informationfordetails.  
APPLICATIONS:  
Meets or exceeds JEDEC standard JESD 82-1A for registered  
DDR clock driver  
Meets proposed DDR1-400 specification  
• For all DDR1 speeds: PC1600 (DDR200), PC2100 (DDR266),  
PC2700 (DDR333), PC3200 (DDR400)  
Along with SSTV16857, SSTVF16857, SSTV16859, SSTVM16859,  
SSTVF16859, DDR1 register, provides complete solution for  
DDR1 DIMMs  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
NOVEMBER 2008  
1
c
2008 Integrated Device Technology, Inc.  
DSC-6201/17  

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