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IDT79RC4640 PDF预览

IDT79RC4640

更新时间: 2024-01-10 19:01:19
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
23页 196K
描述
Low-Cost Embedded 64-bit RISController w/ DSP Capability

IDT79RC4640 数据手册

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IDT79RC4640™  
Low-Cost Embedded  
64-bit RISController  
w/ DSP Capability  
Low-power operation  
Features  
Active power management powers-down inactive units  
Standby mode  
Large, efficient on-chip caches  
High-performance embedded 64-bit microprocessor  
64-bit integer operations  
64-bit registers  
Based on the MIPS RISC Architecture  
100MHz, 133MHz, 150MHz, 180MHz, 200MHz and 267MHz  
operating frequencies  
Separate 8KB Instruction and 8KB Data caches  
Over 3200MB/sec bandwidth from internal caches  
2-set associative  
Write-back and write-through support  
Cache locking, to facilitate deterministic response  
High performance write protocols, for graphics and data  
communications  
32-bit bus interface brings 64-bit power to 32-bit system cost  
High-performance DSP capability  
133.5 Million Integer Mul-Accumulate  
operations/sec @267MHz  
Bus compatible with RC4000 family  
89 MFlops floating-point operations @267MHz  
System interfaces to 125MHz, provides bandwidth up to 500  
MB/sec  
Direct interface to 32-bit wide systems  
Synchronized to external reference clock for multi- master  
operation  
High-performance microprocessor  
133.5 M Mul-Add/second @267MHz  
89 MFlops @267MHz  
>640,000 dhrystone (2.1)/sec capability @267MHz (352  
dhrystone MIPS)  
Socket compatible with IDT RC 64474 and RC64574  
High level of integration  
Improved real-time support  
64-bit, 267 MHz integer CPU  
8KB instruction cache; 8KB data cache  
Integer multiply unit with 133.5M Mul-Add/sec  
Fast interrupt decode  
Optional cache locking  
Note: “R” refers to 5V parts; “RV” refers to 3.3V parts; “RC”  
refers to both  
Upwardly software compatible with IDT RISController  
Family  
Easily upgradable to 64-bit system  
Block Diagram  
System Control Coprocessor  
267 MHz 64-bit CPU  
89 MFlops Single-Precision FPA  
FP Register File  
Address Translation/  
Cache Attribute Control  
64-bit Register File  
64-bit Adder  
Load Aligner  
Store Aligner  
Logic Unit  
Pack/Unpack  
Exception Management  
Functions  
FP Add/Sub/Cvt/  
Div/Sqrt  
High-Performance  
Integer Multiply  
FP Multiply  
Control Bus  
Data Bus  
Instruction Bus  
Instruction Cache  
Set A  
(Lockable)  
Data Cache  
Set A  
(Lockable)  
32-bit  
Synchronized  
System Interface  
Instruction Cache  
Set B  
Data Cache  
Set B  
The IDT logo is a registered trademark and RC4600, RC4650, RC3081,RC3052,RC3051,RC3041 RISController, and RISCore are trademarks of Integrated Device Technology, Inc.  
1 of 23  
April 10, 2001  
DSC 3486/2  
2001 Integrated Device Technology, Inc.  

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