79RC64574™
79RC64575™
Advanced 64-bit
Microprocessors
Product Family
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Big- or Little-endian capability
RC5000 compatible memory management
Features
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High-performance 64-bit embedded Microprocessor
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On-chip 48-entry, 96-page TLB, for advanced operating
system support
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250MHz operating frequency
>330 Dhrystone MIPS performance
300MFLOPS/s floating-point performance
Up to 125 million multiply accumulate per second (MAC/s)
MIPS-IV Instruction Set Architecture (ISA), with integer DSP
and 3-operand integer multiply extensions
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Compatible with major operating systems:
Windows®CE, VxWorks, and others
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Bus compatible with IDT 64-bit microprocessor families
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Pipeline runs at 2 to 8 times the bus frequency
Bus speeds to 125MHz
32-bit bus option, for lower cost systems
Enhanced timing protocol for SyncDRAM systems (compatible
with IDT79RC64474/475)
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Limited dual-issue microarchitecture
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Compatible with RC4640 and RC32364 DSP extensions
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DSP Extensions, for consumer applications
2-cycle repeat rate, on atomic Multiply-add
Multiply-subtract (MSUB) support, for complex number
processing
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RC64574:
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32-bit SysAd bus, for low-cost systems
Pin compatible with RC4640 and RC64474
128-pin QFP package
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Count-leading-zero/one support, for string searches and
normalization
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High-performance on-chip cache subsystem
RC64575:
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32kB, two-set associative instruction cache (I-cache)
32kB, two-set associative data cache (D-cache)
Write-through and write-back data cache operations
High-performance cache-ops, bandwidth management
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64-bit SysAd bus interface
Pin compatible with RC4650 and RC64475
208-pin QFP package
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Industrial temperature range support
JTAG Boundary Scan Interface
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I-cache and D-cache locking capability (per line), provides
improved real-time support
2.5V operation with 3.3V tolerant I/O
Joint TLB on-chip, for virtual-to-physical address mapping
Block Diagram
PLL
64-bit
Integer
Execution Unit
666 MFIOPS
IEEE 1284
Floating-Point
Accelerator
DSP
Accelerator
RC5000
Compatible
System Control
Coprocessor
Dual-Issue Instruction Fetch Unit
Primary Cache Controller
48-entry
96-page
TLB
32kB
32kB
2 set-associative
Data
2 set-associative
Instruction
Cache
Cache
(Lockable)
(Lockable)
64-bit/32-bit
RC64474/475 Compatible
System Interface
ClkIn
Figure 1 RC64574/RC64575 Block Diagram
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
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December 14, 2001
DSC 5607
© 2001 Integrated Device Technology, Inc.