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IDT74LVCH162374APVG PDF预览

IDT74LVCH162374APVG

更新时间: 2024-11-07 19:58:51
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路触发器
页数 文件大小 规格书
6页 112K
描述
Bus Driver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, GREEN, SSOP-48

IDT74LVCH162374APVG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP48,.4
针数:48Reach Compliance Code:unknown
风险等级:5.54系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:15.875 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.012 A
湿度敏感等级:1位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP48,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:6.2 ns传播延迟(tpd):6.5 ns
认证状态:Not Qualified座面最大高度:2.794 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:7.5 mm
Base Number Matches:1

IDT74LVCH162374APVG 数据手册

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3.3V CMOS 16-BIT  
IDT74LVCH162374A  
EDGE TRIGGERED D-TYPE FLIP-  
FLOP WITH 3-STATE OUTPUTS,  
5 VOLT TOLERANT I/O, BUS-HOLD  
DESCRIPTION:  
FEATURES:  
The LVCH162374A 16-bit edge-triggered D-type flip-flop is built using  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
advanced dual metal CMOS technology. This high-speed, low-power  
register is ideal for use as a buffer register for data synchronization and  
storage. The output enable (OE) and clock (CLK) controls are organized  
to operate each device as two 8-bit registers or one 16-bit register with  
commonclock. Flow-throughorganizationofsignalpinssimplifieslayout.  
All inputs are designed with hysteresis for improved noise margin.  
All pins of the LVCH162374A can be driven from either 3.3V or 5V  
devices. Thisfeatureallowstheuseofthisdeviceasatranslatorinamixed  
3.3V/5V supply system.  
The LVCH162374A has series resistors in the device output structure  
which will significantly reduce line noise when used with light loads. This  
driver has been developed to drive ±12mA at the designated thresholds.  
The LVCH162374A has “bus-hold” which retains the inputs’ last state  
whenevertheinputgoestoahighimpedance.Thispreventsfloatinginputs  
and eliminates the need for pull-up/down resistors.  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• CMOS power levels (0.4μ W typ. static)  
• All inputs, outputs, and I/O are 5V tolerant  
• Available in TSSOP package  
DRIVE FEATURES:  
• Balanced Output Drivers: ±12mA  
• Low switching noise  
APPLICATIONS:  
• 5V and 3.3V mixed voltage systems  
• Data communication and telecommunication systems  
FUNCTIONALBLOCKDIAGRAM  
1
24  
2OE  
1OE  
48  
25  
2CLK  
1CLK  
47  
36  
2D1  
1D1  
1D  
C1  
1D  
C1  
2
13  
2Q1  
1Q1  
TO SEVEN OTHER CHANNELS  
TO SEVEN OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
JANUARY2015  
1
© 2015 Integrated Device Technology, Inc.  
DSC-4678/5  

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