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IDT74LVC16652APF8 PDF预览

IDT74LVC16652APF8

更新时间: 2024-11-11 19:46:07
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管输出元件逻辑集成电路电视
页数 文件大小 规格书
8页 109K
描述
Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56

IDT74LVC16652APF8 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:TSSOP,针数:56
Reach Compliance Code:unknown风险等级:5.73
其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G56JESD-609代码:e0
长度:11.3 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
位数:8功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):7.3 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.4 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

IDT74LVC16652APF8 数据手册

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IDT74LVC16652A  
3.3V CMOS 16-BIT BUS  
REGISTERED TRANSCEIVER,  
5 VOLT TOLERANT I/O  
DESCRIPTION:  
FEATURES:  
The LVC16652A 16-bit registered transceiver is built using advanced  
dual metal CMOS technology. This high-speed, low power device is  
organized as two independent 8-bit bus transceivers with 3-state D-type  
registers.Forexample,theOEABandOEBAsignalscontrolthetransceiver  
functions.  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• CMOS power levels (0.4µ W typ. static)  
• All inputs, outputs, and I/O are 5V tolerant  
• Supports hot insertion  
TheSABandtheSBAcontrolpinsareprovidedtoselecteitherrealtime  
orstoreddatatransfer.Thecircuitryusedforselectcontrolwilleliminatethe  
typical decoding glitch that occurs in a multiplexer during the transition  
betweenstoredandrealtimedata. ALowinputlevelselectsreal-timedata  
and a High level selects stored data.  
• Available in SSOP, TSSOP, and TVSOP packages  
Data on the A or B data bus, or both, can be stored in the internal D-flip-  
flops by the Low-to-High transitions at the appropriate clock pins (CLKAB  
or CLKBA), regardless of the select or enable control pins. Flow-through  
organization of signal pins simplifies layout. All inputs are designed with  
hysteresis for improved noise margin.  
TheLVC16652Aisideallysuitedfordrivinghighcapacitanceloadsand  
low-impedancebackplanes.  
Allpinscanbedrivenfromeithera3.3Vor5Vdevice. Thisfeatureallows  
the use of this device as a translator in a mixed 3.3V/5V supply system.  
DRIVE FEATURES:  
• High Output Drivers: ±24mA  
• Reduced system switching noise  
APPLICATIONS:  
• 5V and 3.3V mixed voltage systems  
• Data communication and telecommunication systems  
FUNCTIONALBLOCKDIAGRAM  
28  
1
1OEAB  
2OEAB  
29  
56  
1OEBA  
2OEBA  
55  
30  
2CLKBA  
1CLKBA  
54  
31  
2SBA  
1SBA  
2
27  
2CLKAB  
1CLKAB  
26  
2SAB  
3
1SAB  
B REG  
B REG  
D
D
C
C
5
42  
15  
52  
2A1  
A REG  
D
2B1  
1A1  
A REG  
D
1B1  
C
C
TO SEVEN OTHER CHANNELS  
TO SEVEN OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
MARCH 1999  
1
© 1999 Integrated Device Technology, Inc.  
DSC-4487/2  

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