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IDT74FCT16245ETEG PDF预览

IDT74FCT16245ETEG

更新时间: 2024-10-28 21:13:03
品牌 Logo 应用领域
艾迪悌 - IDT 逻辑集成电路
页数 文件大小 规格书
7页 142K
描述
Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP48, 0.635 MM PITCH, CERPACK-48

IDT74FCT16245ETEG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DFP
包装说明:DFP,针数:48
Reach Compliance Code:compliant风险等级:5
其他特性:WITH DIRECTION CONTROL系列:FCT
JESD-30 代码:R-GDFP-F48JESD-609代码:e3
长度:15.875 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS TRANSCEIVER位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装形状:RECTANGULAR
封装形式:FLATPACK峰值回流温度(摄氏度):260
传播延迟(tpd):3.2 ns认证状态:Not Qualified
座面最大高度:2.413 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:FLAT端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:9.652 mmBase Number Matches:1

IDT74FCT16245ETEG 数据手册

 浏览型号IDT74FCT16245ETEG的Datasheet PDF文件第2页浏览型号IDT74FCT16245ETEG的Datasheet PDF文件第3页浏览型号IDT74FCT16245ETEG的Datasheet PDF文件第4页浏览型号IDT74FCT16245ETEG的Datasheet PDF文件第5页浏览型号IDT74FCT16245ETEG的Datasheet PDF文件第6页浏览型号IDT74FCT16245ETEG的Datasheet PDF文件第7页 
FAST CMOS 16-BIT  
BIDIRECTIONAL  
IDT54/74FCT16245T/AT/CT/ET  
TRANSCEIVER  
DESCRIPTION:  
FEATURES:  
0.5 MICRON CMOS Technology  
High-speed, low-power CMOS replacement for ABT functions  
Typical tSK(o) (Output Skew) < 250ps  
Low input and output leakage 1µA (max.)  
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP  
and 25 mil pitch CERPACK packages  
Extended commercial range of -40°C to +85°C  
High drive outputs (-32mA IOH, 64mA IOL)  
Power off disable outputs permit live insertion”  
Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA =  
25°C  
The FCT16245T16-bittransceiveris builtusingadvanceddualmetal  
CMOS technology. These high-speed, low-powertransceivers are ideal  
for synchronous communication between two busses (A and B). The  
DirectionandOutputEnable controls operate these devices as eithertwo  
independent 8-bit transceivers or one 16-bit transceiver. The direction  
controlpin(xDIR)controls thedirectionofdataflow.Theoutputenablepin  
(xOE)overridesthedirectioncontrolanddisablesbothports.Allinputsare  
designedwithhysteresis forimprovednoise margin.  
TheFCT16245Tisideallysuitedfordrivinghigh-capacitanceloadsand  
low-impedancebackplanes.Theoutputbuffersaredesignedwithpoweroff  
disablecapabilitytoallow"liveinsertion"ofboardswhenusedasbackplane  
drivers.  
FUNCTIONALBLOCKDIAGRAM  
1 DIR  
2 DIR  
1OE  
1B1  
1B2  
1B3  
1B4  
2OE  
1A1  
1A2  
2A1  
2B1  
2A2  
2B2  
1A3  
1A4  
2A3  
2B3  
2A4  
2B4  
1A5  
1A6  
2A5  
1B5  
1B6  
2B5  
2A6  
2B6  
1A7  
1A8  
2A7  
1B7  
1B8  
2B7  
2A8  
2B8  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
AUGUST 1999  
1
c
1999 Integrated Device Technology, Inc.  
DSC-5456/-  

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