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IDT74FCT162260CTEG PDF预览

IDT74FCT162260CTEG

更新时间: 2024-11-26 19:43:07
品牌 Logo 应用领域
艾迪悌 - IDT 逻辑集成电路
页数 文件大小 规格书
8页 118K
描述
Bus Exchanger, FCT Series, 1-Func, 12-Bit, True Output, CMOS, CDFP56, 0.635 MM PITCH, CERPACK-56

IDT74FCT162260CTEG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DFP
包装说明:0.635 MM PITCH, CERPACK-56针数:56
Reach Compliance Code:compliant风险等级:5.41
系列:FCTJESD-30 代码:R-GDFP-F56
JESD-609代码:e3长度:18.415 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS EXCHANGER
位数:12功能数量:1
端口数量:3端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
峰值回流温度(摄氏度):260传播延迟(tpd):4.7 ns
认证状态:Not Qualified座面最大高度:2.143 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:FLAT
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:9.652 mm
Base Number Matches:1

IDT74FCT162260CTEG 数据手册

 浏览型号IDT74FCT162260CTEG的Datasheet PDF文件第2页浏览型号IDT74FCT162260CTEG的Datasheet PDF文件第3页浏览型号IDT74FCT162260CTEG的Datasheet PDF文件第4页浏览型号IDT74FCT162260CTEG的Datasheet PDF文件第5页浏览型号IDT74FCT162260CTEG的Datasheet PDF文件第6页浏览型号IDT74FCT162260CTEG的Datasheet PDF文件第7页 
FAST CMOS  
IDT54/74FCT162260AT/CT/ET  
12-BIT TRI-PORT  
BUS EXCHANGER  
FEATURES:  
DESCRIPTION:  
0.5 MICRON CMOS Technology  
High-speed, low-power CMOS replacement for ABT functions  
Typical tSK(o) (Output Skew) < 250ps  
Low input and output leakage 1µA (max.)  
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
The FCT162260AT/CT/ET Tri-Port Bus Exchangers are high-speed  
12-bitlatchedbusmultiplexers/transceiversforuseinhigh-speedmicropro-  
cessorapplications. TheseBus Exchangers supportmemoryinterleaving  
withlatchedoutputs onthe Bports andaddress multiplexingwithlatched  
inputs onthe Bports.  
The Tri-Port Bus Exchanger has three 12-bit ports. Data may be  
transferred between the A port and either/both of the B ports. The latch  
enable (LE1B, LE2B, LEA1B and LEA2B) inputs control data storage.  
Whena latch-enable inputis high,the latchis transparent. Whena latch-  
enableinputislow,thedataattheinputislatchedandremainslatcheduntil  
thelatchenableinputisreturnedhigh. Independentoutputenables(OE1B  
and OE2B) allow reading from one port while writing to the other port.  
25 mil pitch SSOP, 19.6 mil pitch TSSOP,15.7 mil pitch TVSOP and  
25 mil pitch CERPACK packages  
Extended commercial range of -40°C to +85°C  
VCC = 5V ±10%  
Balanced Output Drivers:  
±24mA (commercial)  
±16mA (military)  
Reduced system switching noise  
Typical V (Output Ground Bounce) < 0.6V at V = 5V, T =  
25°C  
The FCT162260AT/CT/ET have balanced output drive with current  
limitingresistors. Thisofferslowgroundbounce,minimalundershoot,and  
controlledoutputfalltimes-reducingtheneedforexternalseriesterminating  
OLP  
CC  
A
resistors.  
FUNCTIONALBLOCKDIAGRAM  
29  
OE1B  
30  
LEA1B  
A-1B  
LATCH  
1B1:12  
12  
2
LE1B  
1B-A  
12  
LATCH  
12  
12  
28  
SEL  
1
OEA  
1
M
A1:12  
U
12  
X
0
12  
12  
2B-A  
27  
LATCH  
12  
LE2B  
A-2B  
LATCH  
55  
2B1:12  
12  
LEA2B  
56  
OE2B  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
AUGUST 1999  
1
c
1999 Integrated Device Technology, Inc.  
DSC-5430/-  

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