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IDT74ALVCH162827PF PDF预览

IDT74ALVCH162827PF

更新时间: 2024-11-05 20:23:39
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管输出元件逻辑集成电路电视
页数 文件大小 规格书
6页 103K
描述
Bus Driver, ALVC/VCX/A Series, 2-Func, 10-Bit, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56

IDT74ALVCH162827PF 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:TSSOP, TSSOP56,.25,16
针数:56Reach Compliance Code:not_compliant
风险等级:5.76Is Samacsys:N
其他特性:WITH DUAL OUTPUT ENABLE控制类型:ENABLE LOW
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G56
JESD-609代码:e0长度:11.3 mm
逻辑集成电路类型:BUS DRIVER最大I(ol):0.012 A
湿度敏感等级:1位数:10
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.25,16
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:3.3 VProp。Delay @ Nom-Sup:3.8 ns
传播延迟(tpd):4.4 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.4 mm端子位置:DUAL
宽度:4.4 mmBase Number Matches:1

IDT74ALVCH162827PF 数据手册

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3.3V CMOS 20-BIT  
IDT74ALVCH162827  
BUFFER/DRIVER WITH  
3-STATE OUTPUTS AND  
BUS-HOLD  
FEATURES:  
DESCRIPTION:  
0.5 MICRON CMOS Technology  
TypicaltSK(0) (Output Skew) < 250ps  
This 20-bit buffer/driver is built using advanced dual metal CMOS  
technology. The ALVCH162827 device provides high-performance bus  
interface buffering for wide data/address paths or busses carrying parity.  
Two pairs of NAND-ed output enable controls offer maximum control  
flexibility and are organized to operate the device as two 10-bit buffers or  
one 20-bit buffer. Flow-through organization of signal pins facilitates  
ease of layout. All inputs are designed with hysteresis for improved noise  
margin.  
ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
0.635mm pitch SSOP, 0.50mm pitch TSSOP,  
and 0.40mm pitch TVSOP packages  
Extended commercial range of – 40°C to + 85°C  
VCC = 3.3V ± 0.3V, Normal Range  
VCC = 2.7V to 3.6V, Extended Range  
VCC = 2.5V ± 0.2V  
CMOS power levels (0.4µW typ. static)  
The ALVCH162827 has series resistors in the device output structure  
which will significantly reduce line noise when used with light loads. This  
driver has been designed to drive ±12mA at the designated threshold  
levels.  
Rail-to-Rail output swing for increased noise margin  
Drive Features for ALVCH162827:  
Balanced Output Drivers: ±12mA  
Low switching noise  
The ALVCH162827 has bus-hold” which retains the inputs’ last state  
whenever the input bus goes to a high impedance. This prevents floating  
inputs and eliminates the need for pull-up/down resistors.  
APPLICATIONS:  
3.3V High Speed Systems  
3.3V and lower voltage computing systems  
Functional Block Diagram  
28  
1
2OE1  
1OE1  
29  
56  
2OE2  
1OE2  
42  
15  
55  
2
2A1  
2Y1  
1A1  
1Y1  
TO NINE OTHER CHANNELS  
TO NINE OTHER CHANNELS  
EXTENDED COMMERCIAL TEMPERATURE RANGE  
MARCH1999  
1
c
1999 Integrated Device Technology, Inc.  
DSC-4567/1  

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