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IDT74ALVCH162373PF8 PDF预览

IDT74ALVCH162373PF8

更新时间: 2024-11-18 13:39:31
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路电视
页数 文件大小 规格书
6页 72K
描述
Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.40 MM PITCH, TVSOP-48

IDT74ALVCH162373PF8 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:TSSOP,针数:48
Reach Compliance Code:unknown风险等级:5.74
Is Samacsys:N系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G48JESD-609代码:e0
长度:9.7 mm逻辑集成电路类型:BUS DRIVER
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):5 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.4 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

IDT74ALVCH162373PF8 数据手册

 浏览型号IDT74ALVCH162373PF8的Datasheet PDF文件第2页浏览型号IDT74ALVCH162373PF8的Datasheet PDF文件第3页浏览型号IDT74ALVCH162373PF8的Datasheet PDF文件第4页浏览型号IDT74ALVCH162373PF8的Datasheet PDF文件第5页浏览型号IDT74ALVCH162373PF8的Datasheet PDF文件第6页 
3.3V CMOS 16-BIT TRANS-  
PARENT D-TYPE LATCH  
WITH 3-STATE OUTPUTS  
AND BUS-HOLD  
IDT74ALVCH162373  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
This16-bittransparentD-typelatchisbuiltusingadvanceddualmetalCMOS  
technology.TheALVCH162373isparticularlysuitableforimple-mentingbuffer  
registers,I/Oports,bidirectionalbusdrivers,andworkingregisters.Thisdevice  
canbeusedastwo8-bitlatchesorone16-bitlatch.Whenthelatchenable(LE)  
inputishigh,theQoutputsfollowthedata(D)inputs.WhenLEistakenlow,the  
Qoutputs arelatchedatthelevels setupattheDinputs.  
Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
VCC = 3.3V ± 0.3V, Normal Range  
VCC = 2.7V to 3.6V, Extended Range  
VCC = 2.5V ± 0.2V  
• CMOS power levels (0.4µ W typ. static)  
• Rail-to-Rail output swing for increased noise margin  
Available in SSOP, TSSOP, and TVSOP packages  
Abufferedoutput-enable(OE)canbeusedtoplacetheeightoutputsineither  
anormallogicstate(highorlowlogiclevels)orahigh-impedancestate.Inthe  
high-impedancestate,theoutputsneitherloadnordrivethebuslinessignifi-  
cantly.Thehigh-impedancestateandtheincreaseddriveprovidethecapability  
todrivebuslineswithoutneedforinterfaceorpullupcomponents.OEdoesnot  
affectinternaloperationsofthelatch.Olddatacanberetainedornewdatacan  
beeneteredwhiletheoutputsareinthehigh-impedancestate.  
TheALVCH162373hasseriesresistorsinthedeviceoutputstructurewhich  
willsignificantlyreducelinenoisewhenusedwithlightloads.Thisdriverhas  
beendesignedtodrive±12mAatthedesignatedthresholdlevels.  
The ALVCH162373 has bus-hold” which retains the inputs’ last state  
whenevertheinputgoestoahighimpedance.Thispreventsfloatinginputsand  
eliminatestheneedforpull-up/downresistor.  
DRIVE FEATURES:  
• Balanced Output Drivers: ±12mA  
Low switching noise  
APPLICATIONS:  
• 3.3V high speed systems  
• 3.3V and lower voltage computing systems  
FUNCTIONALBLOCKDIAGRAM  
1
24  
2OE  
1OE  
48  
25  
2LE  
1LE  
C1  
C1  
2
13  
1Q1  
2Q1  
47  
36  
1D1  
1D  
1D  
2D1  
TO 7 OTHER CHANNELS  
TO 7 OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
MARCH 1999  
1
© 1999 Integrated Device Technology, Inc.  
DSC-4575/2  

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