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IDT72V51343L7-5BBG PDF预览

IDT72V51343L7-5BBG

更新时间: 2024-11-06 21:05:39
品牌 Logo 应用领域
艾迪悌 - IDT LTE先进先出芯片
页数 文件大小 规格书
49页 458K
描述
FIFO, 64KX18, 4ns, Synchronous, CMOS, PBGA256, 17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-256

IDT72V51343L7-5BBG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:BGA
包装说明:17 X 17 MM, 1 MM PITCH, PLASTIC, BGA-256针数:256
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.31
最长访问时间:4 ns其他特性:ALTERNATIVE MEMORY WIDTH:9-BIT
周期时间:7.5 nsJESD-30 代码:S-PBGA-B256
JESD-609代码:e1长度:17 mm
内存密度:1179648 bit内存宽度:18
湿度敏感等级:3功能数量:1
端子数量:256字数:65536 words
字数代码:64000工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:64KX18可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装形状:SQUARE封装形式:GRID ARRAY
并行/串行:PARALLEL峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:3.5 mm
最大供电电压 (Vsup):3.45 V最小供电电压 (Vsup):3.15 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30宽度:17 mm
Base Number Matches:1

IDT72V51343L7-5BBG 数据手册

 浏览型号IDT72V51343L7-5BBG的Datasheet PDF文件第2页浏览型号IDT72V51343L7-5BBG的Datasheet PDF文件第3页浏览型号IDT72V51343L7-5BBG的Datasheet PDF文件第4页浏览型号IDT72V51343L7-5BBG的Datasheet PDF文件第5页浏览型号IDT72V51343L7-5BBG的Datasheet PDF文件第6页浏览型号IDT72V51343L7-5BBG的Datasheet PDF文件第7页 
3.3VMULTI-QUEUEFLOW-CONTROLDEVICES  
(8QUEUES)18BITWIDECONFIGURATION  
IDT72V51333  
IDT72V51343  
IDT72V51353  
589,824bits  
1,179,648bits  
2,359,296bits  
Individual, Active queue flags (OV, FF, PAE, PAF)  
8 bit parallel flag status on both read and write ports  
Provides continuous PAE and PAF status of up to 8 Queues  
Global Bus Matching - (All Queues have same Input Bus Width  
and Output Bus Width)  
User Selectable Bus Matching Options:  
- x18in to x18out  
- x9in to x18out  
FEATURES:  
Choose from among the following memory density options:  
IDT72V51333  
IDT72V51343  
IDT72V51353  
Total Available Memory = 589,824 bits  
Total Available Memory = 1,179,648 bits  
Total Available Memory = 2,359,296 bits  
Configurable from 1 to 8 Queues  
Queues may be configured at master reset from the pool of  
Total Available Memory in blocks of 512 x 18 or 1,024 x 9  
Independent Read and Write access per queue  
User programmable via serial port  
Default multi-queue device configurations  
-IDT72V51333: 4,096 x 18 x 8Q or 8,192 x 9 x 8Q  
-IDT72V51343: 8,192 x 18 x 8Q or 16,384 x 9 x 8Q  
-IDT72V51353: 16,384 x 18 x 8Q or 32,768 x 9 x 8Q  
100% Bus Utilization, Read and Write on every clock cycle  
166 MHz High speed operation (6ns cycle time)  
3.7ns access time  
- x18in to x9out  
- x9in to x9out  
FWFT mode of operation on read port  
Partial Reset, clears data in single Queue  
Expansion of up to 8 multi-queue devices in parallel is available  
JTAG Functionality (Boundary Scan)  
Available in a 256-pin PBGA, 1mm pitch, 17mm x 17mm  
HIGH Performance submicron CMOS technology  
Industrial temperature range (-40°C to +85°C) is available  
FUNCTIONALBLOCKDIAGRAM  
MULTI-QUEUE FLOW-CONTROL DEVICE  
WADEN  
FSTR  
RADEN  
ESTR  
RDADD  
REN  
Q0  
WRADD  
WEN  
7
6
RCLK  
WCLK  
OE  
Q
out  
D
in  
x9, x18  
x9, x18  
DATA IN  
DATA OUT  
OV  
FF  
Q7  
PAF  
PAE  
PAFn  
8
PAEn  
8
5940 drw01  
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc.  
JUNE 2003  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
1
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-5940/9  

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