Datasheet > IDT72V15165L15TFGI

IDT72V15165L15TFGI

更新时间： 2024-11-24 07:16:59

品牌	Logo	应用领域
艾迪悌 - IDT		先进先出芯片
页数	文件大小	规格书
8页	122K
描述
FIFO, 4KX16, 10ns, Synchronous, PQFP64, 10 X 10 MM, PLASTIC, STQFP-64

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

IDT72V15165L15TFGI 数据手册

浏览型号IDT72V15165L15TFGI的Datasheet PDF文件第2页

浏览型号IDT72V15165L15TFGI的Datasheet PDF文件第3页

浏览型号IDT72V15165L15TFGI的Datasheet PDF文件第4页

浏览型号IDT72V15165L15TFGI的Datasheet PDF文件第5页

浏览型号IDT72V15165L15TFGI的Datasheet PDF文件第6页

浏览型号IDT72V15165L15TFGI的Datasheet PDF文件第7页

3.3 VOLT MULTIMEDIA FIFO

256 x 16, 512 x 16,

1,024 x 16, 2,048 x 16,

and 4,096 x 16

IDT72V11165, IDT72V12165

IDT72V13165, IDT72V14165

IDT72V15165

FEATURES

DESCRIPTION

• 256 x 16-bit organization array (IDT72V11165)

• 512 x 16-bit organization array (IDT72V12165)

• 1,024 x 16-bit organization array (IDT72V13165)

• 2,048 x 16-bit organization array (IDT72V14165)

• 4,096 x 16-bit organization array (IDT72V15165)

• 15 ns read/write cycle time

TheIDT72V11165/72V12165/72V13165/72V14165/72V15165 devices

areFirst-In,First-Out(FIFO)memorieswithclockedreadandwritecontrols.

TheseFIFOshave16-bitinputandoutputports. Theinputportiscontrolled

byafree-runningclock(WCLK),andaninputenablepin(WEN).Dataiswritten

intotheMultimediaFIFOoneveryclockwhenWENisasserted.Theoutputport

iscontrolledbyanotherclockpin(RCLK)andanotherenablepin(REN).The

ReadClock(RCLK)canbetiedtotheWriteClockforsingleclockoperationor

thetwoclockscanrunasynchronousofoneanotherfordual-clockoperation.

AnOutputEnablepin(OE)isprovidedonthereadportforthree-statecontrol

oftheoutput.

• 5V input tolerant

• Independent Read and Write Clocks

• Empty/Full and Half-Full flag capability

• Output enable puts output data bus in high-impedance state

• Available in a 64-lead thin quad flatpack (10x10mm and 14x14mm

TQFP)

TheseMultimediaFIFOs supportthreefixedflags:EmptyFlag(EF),Full

Flag (FF), and Half Full Flag (HF).

• Industrial temperature range (–40°C to +85°C)

FUNCTIONAL BLOCK DIAGRAM

WCLK

RCLK

READ

CONTROL

WRITE

CONTROL

WEN

REN

FIFO ARRAY

- D15

Q0 - Q15

Data In

x16

Data Out

x16

RESET LOGIC

FLAG OUTPUTS

6359 drw01

IDTandtheIDTlogoaretrademarksofIntegratedDeviceTechnology,Inc.

NOVEMBER 2003

INDUSTRIAL TEMPERATURE RANGE

DSC-6359/3

12 3 4 5 6 7 8

中文翻译

下载PDF

与IDT72V15165L15TFGI相关器件

型号	品牌	获取价格	描述	数据表
IDT72V15165L15TFI	IDT	获取价格	3.3 VOLT MULTIMEDIA FIFO 256 x 16, 512 x 16, 1,024 x 16, 2,048 x 16, and 4,096 x 16
IDT72V15165L15TFI8	IDT	获取价格	FIFO, 4KX16, 10ns, Synchronous, PQFP64, 10 X 10 MM, PLASTIC, STQFP-64
IDT72V15320	IDT	获取价格	3.3V MULTIMEDIA FIFO 16 BIT V-III, 32 BIT Vx-III FAMILY UP TO 1 Mb DENSITY
IDT72V15320L10BBGI	IDT	获取价格	FIFO, 2KX32, 6.5ns, Synchronous, CMOS, PBGA144, 13 X 13 MM, 1 MM PITCH, PLASTIC, BGA-144
IDT72V15320L10BBI	IDT	获取价格	FIFO, 2KX32, 6.5ns, Synchronous, CMOS, PBGA144, 13 X 13 MM, 1 MM PITCH, PLASTIC, BGA-144
IDT72V15320L10BBI8	IDT	获取价格	FIFO, 2KX32, 6.5ns, Synchronous, CMOS, PBGA144, 13 X 13 MM, 1 MM PITCH, PLASTIC, BGA-144
IDT72V15320L10PFGI	IDT	获取价格	FIFO, 2KX32, 6.5ns, Synchronous, CMOS, PQFP128, TQFP-128
IDT72V15320L10PFGI8	IDT	获取价格	FIFO, 2KX32, 6.5ns, Synchronous, CMOS, PQFP128, TQFP-128
IDT72V15320L10PFI	IDT	获取价格	FIFO, 2KX32, 6.5ns, Synchronous, CMOS, PQFP128, TQFP-128
IDT72V15320L10PFI8	IDT	获取价格	FIFO, 2KX32, 6.5ns, Synchronous, CMOS, PQFP128, TQFP-128

与IDT72V15165L15TFGI相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

35
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

26
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

54
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

52

产品中心

服务支持

精选活动

关于我们

帮助中心

IDT72V15165L15TFGI

IDT72V15165L15TFGI 数据手册

与IDT72V15165L15TFGI相关器件

与IDT72V15165L15TFGI相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

IDT72V15165L15TFGI

IDT72V15165L15TFGI 数据手册

与IDT72V15165L15TFGI相关器件

与IDT72V15165L15TFGI相关文章

您还可以找

您在本页遇到什么问题？