5秒后页面跳转
IDT72V14165 PDF预览

IDT72V14165

更新时间: 2024-11-22 23:01:15
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
8页 122K
描述
3.3 VOLT MULTIMEDIA FIFO 256 x 16, 512 x 16, 1,024 x 16, 2,048 x 16, and 4,096 x 16

IDT72V14165 数据手册

 浏览型号IDT72V14165的Datasheet PDF文件第2页浏览型号IDT72V14165的Datasheet PDF文件第3页浏览型号IDT72V14165的Datasheet PDF文件第4页浏览型号IDT72V14165的Datasheet PDF文件第5页浏览型号IDT72V14165的Datasheet PDF文件第6页浏览型号IDT72V14165的Datasheet PDF文件第7页 
3.3 VOLT MULTIMEDIA FIFO  
256 x 16, 512 x 16,  
1,024 x 16, 2,048 x 16,  
and 4,096 x 16  
IDT72V11165, IDT72V12165  
IDT72V13165, IDT72V14165  
IDT72V15165  
FEATURES  
DESCRIPTION  
256 x 16-bit organization array (IDT72V11165)  
512 x 16-bit organization array (IDT72V12165)  
1,024 x 16-bit organization array (IDT72V13165)  
2,048 x 16-bit organization array (IDT72V14165)  
4,096 x 16-bit organization array (IDT72V15165)  
15 ns read/write cycle time  
TheIDT72V11165/72V12165/72V13165/72V14165/72V15165 devices  
areFirst-In,First-Out(FIFO)memorieswithclockedreadandwritecontrols.  
TheseFIFOshave16-bitinputandoutputports. Theinputportiscontrolled  
byafree-runningclock(WCLK),andaninputenablepin(WEN).Dataiswritten  
intotheMultimediaFIFOoneveryclockwhenWENisasserted.Theoutputport  
iscontrolledbyanotherclockpin(RCLK)andanotherenablepin(REN).The  
ReadClock(RCLK)canbetiedtotheWriteClockforsingleclockoperationor  
thetwoclockscanrunasynchronousofoneanotherfordual-clockoperation.  
AnOutputEnablepin(OE)isprovidedonthereadportforthree-statecontrol  
oftheoutput.  
5V input tolerant  
Independent Read and Write Clocks  
Empty/Full and Half-Full flag capability  
Output enable puts output data bus in high-impedance state  
Available in a 64-lead thin quad flatpack (10x10mm and 14x14mm  
TQFP)  
TheseMultimediaFIFOs supportthreefixedflags:EmptyFlag(EF),Full  
Flag (FF), and Half Full Flag (HF).  
Industrial temperature range (–40°C to +85°C)  
FUNCTIONAL BLOCK DIAGRAM  
WCLK  
RCLK  
READ  
CONTROL  
WRITE  
CONTROL  
WEN  
REN  
OE  
FIFO ARRAY  
D0  
- D15  
Q0 - Q15  
Data In  
x16  
Data Out  
x16  
RESET LOGIC  
FLAG OUTPUTS  
EF  
HF  
FF  
RS  
6359 drw01  
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc.  
NOVEMBER 2003  
INDUSTRIAL TEMPERATURE RANGE  
1
2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-6359/2  

与IDT72V14165相关器件

型号 品牌 获取价格 描述 数据表
IDT72V14165L15TFGI IDT

获取价格

FIFO, 2KX16, 10ns, Synchronous, PQFP64, 10 X 10 MM, PLASTIC, STQFP-64
IDT72V14165L15TFI IDT

获取价格

3.3 VOLT MULTIMEDIA FIFO 256 x 16, 512 x 16, 1,024 x 16, 2,048 x 16, and 4,096 x 16
IDT72V14165L15TFI8 IDT

获取价格

FIFO, 2KX16, 10ns, Synchronous, PQFP64, 10 X 10 MM, PLASTIC, STQFP-64
IDT72V14320 IDT

获取价格

3.3V MULTIMEDIA FIFO 16 BIT V-III, 32 BIT Vx-III FAMILY UP TO 1 Mb DENSITY
IDT72V14320L10PFGI8 IDT

获取价格

FIFO, 1KX32, 6.5ns, Synchronous, CMOS, PQFP128, TQFP-128
IDT72V14320L10PFI IDT

获取价格

FIFO, 1KX32, 6.5ns, Synchronous, CMOS, PQFP128, TQFP-128
IDT72V14320L10PFI8 IDT

获取价格

FIFO, 1KX32, 6.5ns, Synchronous, CMOS, PQFP128, TQFP-128
IDT72V15160 IDT

获取价格

3.3V MULTIMEDIA FIFO 16 BIT V-III, 32 BIT Vx-III FAMILY UP TO 1 Mb DENSITY
IDT72V15160L10BBI IDT

获取价格

FIFO, 4KX16, 6.5ns, Synchronous/Asynchronous, CMOS, PBGA144
IDT72V15160L10PFGI IDT

获取价格

FIFO, 4KX16, 6.5ns, Synchronous, CMOS, PQFP80, TQFP-80