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IDT72801L15TFI PDF预览

IDT72801L15TFI

更新时间: 2024-01-21 14:05:48
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
16页 158K
描述
DUAL CMOS SyncFIFO

IDT72801L15TFI 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:SLIM, TQFP-64针数:64
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.25
最长访问时间:10 ns最大时钟频率 (fCLK):66.7 MHz
周期时间:15 nsJESD-30 代码:S-PQFP-G64
JESD-609代码:e0长度:10 mm
内存密度:2304 bit内存集成电路类型:OTHER FIFO
内存宽度:9湿度敏感等级:3
功能数量:2端子数量:64
字数:256 words字数代码:256
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:256X9
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP64,.47SQ,20
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):240
电源:5 V认证状态:Not Qualified
座面最大高度:1.6 mm最大待机电流:0.01 A
子类别:FIFOs最大压摆率:0.06 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:20宽度:10 mm
Base Number Matches:1

IDT72801L15TFI 数据手册

 浏览型号IDT72801L15TFI的Datasheet PDF文件第10页浏览型号IDT72801L15TFI的Datasheet PDF文件第11页浏览型号IDT72801L15TFI的Datasheet PDF文件第12页浏览型号IDT72801L15TFI的Datasheet PDF文件第13页浏览型号IDT72801L15TFI的Datasheet PDF文件第14页浏览型号IDT72801L15TFI的Datasheet PDF文件第15页 
DEPTH EXPANSION — IDT72801/72811/72821/72831/72841/72851 access from one device to the next in a sequential manner. These FIFOs  
can be adapted to applications that require greater than 256/512/1,024/ operate in the Depth Expansion configuration when the following conditions  
2,048/4,096/8,192 words. The existence of double enable pins on the read are met:  
andwrite ports allowdepthexpansion. The Write Enable 2/Load (WENA2,  
1. WENA2/LDAandWENB2/LDBpins are heldHIGHduring Resetso  
WENB2) pins are used as a second write enables in a depth expansion that these pins operate as second Write Enables.  
configuration, thus the Programmable flags are set to the default values.  
Depth expansion is possible by using one enable input for system control  
2. External logic is used to control the flow of data.  
Please see the Application Note" DEPTH EXPANSION OF IDT'S SYN-  
whiletheotherenableinputiscontrolledbyexpansionlogictodirecttheflow CHRONOUSFIFOsUSINGTHERINGCOUNTERAPPROACH"fordetails  
of data. A typical application would have the expansion logic alternate data of this configuration.  
ORDERING INꢀORMATION  
IDT  
XXXXX  
XX  
XX  
X
X
Device Type  
Power  
Speed  
Package  
Process/  
Temperature  
Range  
BLANK Commercial (0 C to +70 C)  
(1)  
Industrial (-40 C to +85 C)  
I
PF  
TF  
Thin Quad Flatpack (TQFP, PN64-1)  
Slim Thin Quad Flatpack(STQFP, PP64-1)  
Commercial Only  
Commercial and Industrial  
Commercial and Industrial  
Clock Cycle Time  
(tCLK), Speed in  
Nanoseconds  
10  
15  
25  
L
Low Power  
72801  
72811  
72821  
256 x 9 Dual SyncFIFO  
512 x 9 Dual SyncFIFO  
1,024 x 9 Dual SyncFIFO  
2,048 x 9 Dual SyncFIFO  
4,096 x 9 Dual SyncFIFO  
8,192 x 9 Dual SyncFIFO  
72831  
72841  
72851  
3034 drw 19  
NOTES:  
1. Industrial temperature range product for 15ns and 25ns speed grade are available as a standard device.  
DATASHEETDOCUMENTHISTORY  
04/24/2001  
pgs. 4, 5 and 16  
CORPORATE HEADQUARTERS  
2975StenderWay  
Santa Clara, CA 95054  
for SALES:  
800-345-7015 or 408-727-6116  
fax: 408-492-8674  
for TECH SUPPORT:  
(408) 330-1753  
e-mail:FIFOhelp@idt.com  
www.idt.com  
PFPkg:www.idt.com/docs/PSC4036.pdf  
TFPkg:www.idt.com/docs/PSC4046.pdf  
The SyncFIFO is a trademark and the IDT logo is a registered trademark of Integrated Device Technology, Inc.  
16  

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