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IDT72291L15TFI9 PDF预览

IDT72291L15TFI9

更新时间: 2024-01-28 05:36:35
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
26页 271K
描述
FIFO, 128KX9, 10ns, Synchronous, CMOS, PQFP64, STQFP-64

IDT72291L15TFI9 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:STQFP-64针数:64
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.91
最长访问时间:10 ns其他特性:RETRANSMIT; AUTO POWER DOWN; EASY EXPANDABLE IN DEPTH AND WIDTH
周期时间:15 nsJESD-30 代码:S-PQFP-G64
JESD-609代码:e0长度:10 mm
内存密度:1179648 bit内存宽度:9
湿度敏感等级:3功能数量:1
端子数量:64字数:131072 words
字数代码:128000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:128KX9可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):240
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:20宽度:10 mm
Base Number Matches:1

IDT72291L15TFI9 数据手册

 浏览型号IDT72291L15TFI9的Datasheet PDF文件第1页浏览型号IDT72291L15TFI9的Datasheet PDF文件第3页浏览型号IDT72291L15TFI9的Datasheet PDF文件第4页浏览型号IDT72291L15TFI9的Datasheet PDF文件第5页浏览型号IDT72291L15TFI9的Datasheet PDF文件第6页浏览型号IDT72291L15TFI9的Datasheet PDF文件第7页 
IDT72281/72291  
CMOS SuperSync FIFO™ 65,536 x 9 and 131,072 x 9  
COMMERCIALANDINDUSTRIAL  
TEMPERATURERANGES  
operation,whichconsistsofactivatingRENandenablingarisingRCLKedge,  
willshiftthewordfrominternalmemorytothedataoutputlines.  
DESCRIPTION(CONTINUED)  
InFWFTmode,thefirstwordwrittentoanemptyFIFOisclockeddirectlyto  
thedataoutputlinesafter threetransitionsoftheRCLKsignal.ARENdoesnot  
havetobeassertedforaccessingthefirstword.However,subsequentwords  
writtentotheFIFOdorequireaLOWonRENforaccess. ThestateoftheFWFT/  
SIinputduringMasterResetdeterminesthetimingmodeinuse.  
ForapplicationsrequiringmoredatastoragecapacitythanasingleFIFOcan  
provide,theFWFTtimingmodepermitsdepthexpansionbychainingFIFOs  
inseries(i.e.thedataoutputsofoneFIFOareconnectedtothecorresponding  
data inputs of the next). No external logic is required.  
TheinputportiscontrolledbyaWriteClock(WCLK)inputandaWriteEnable  
(WEN)input. DataiswrittenintotheFIFOoneveryrisingedgeofWCLKwhen  
WENisasserted.TheoutputportiscontrolledbyaReadClock(RCLK)input  
andReadEnable(REN)input. DataisreadfromtheFIFOoneveryrisingedge  
ofRCLKwhenRENisasserted. AnOutputEnable(OE)inputisprovidedfor  
three-statecontroloftheoutputs.  
ThefrequenciesofboththeRCLKandtheWCLKsignalsmayvaryfrom0  
tofMAXwithcompleteindependence. Therearenorestrictionsonthefrequency  
oftheoneclockinputwithrespecttotheother.  
TheseFIFOshavefiveflagpins,EF/OR(EmptyFlagorOutputReady),FF/  
IR(FullFlagorInputReady),HF(Half-fullFlag),PAE(ProgrammableAlmost-  
Emptyflag)andPAF(ProgrammableAlmost-Fullflag). TheEFandFFfunctions  
areselectedinIDTStandardmode. TheIRandORfunctionsareselectedin  
Therearetwopossibletimingmodesofoperationwiththesedevices:IDT  
Standard mode and First Word Fall Through (FWFT) mode.  
InIDTStandardmode,thefirstwordwrittentoanemptyFIFOwillnotappear  
onthedataoutputlinesunlessaspecificreadoperationisperformed.Aread  
PINCONFIGURATIONS  
PIN 1  
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49  
WEN  
SEN  
DC(1)  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
DNC(3)  
DNC(3)  
GND  
DNC(3)  
DNC(3)  
2
3
VCC  
4
VCC  
5
GND(2)  
GND(2)  
GND(2)  
GND(2)  
GND(2)  
GND(2)  
GND(2)  
GND(2)  
GND(2)  
D8  
6
VCC  
DNC(3)  
DNC(3)  
DNC(3)  
GND  
DNC(3)  
DNC(3)  
Q8  
7
8
9
10  
11  
12  
13  
14  
15  
16  
Q7  
Q6  
D7  
GND  
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32  
4675 drw 02  
TQFP (PN64-1, ORDER CODE: PF)  
STQFP (PP64-1, ORDER CODE: TF)  
TOP VIEW  
NOTES:  
1. DC = Don’t Care. Must be tied to GND or VCC, cannot be left open.  
2. This pin may either be tied to GND or left open.  
3. DNC = Do Not Connect.  
2

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