5秒后页面跳转
捷配首页

Datasheet > IDT71V65703S80BGGI
IDT71V65703S80BGGI PDF预览

IDT71V65703S80BGGI

更新时间： 2024-11-08 17:44:55
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
26页 972K
描述
ZBT SRAM, 256KX36, 8ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, MS-026AA, BGA-119

阅读下载

中文翻译

获取价格

IDT71V65703S80BGGI 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：BGA
包装说明：BGA,针数：119
Reach Compliance Code：compliantECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41风险等级：5.18
最长访问时间：8 ns其他特性：FLOW-THROUGH ARCHITECTURE
JESD-30 代码：R-PBGA-B119JESD-609代码：e1
长度：22 mm内存密度：9437184 bit
内存集成电路类型：ZBT SRAM内存宽度：36
湿度敏感等级：3功能数量：1
端子数量：119字数：262144 words
字数代码：256000工作模式：SYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：256KX36封装主体材料：PLASTIC/EPOXY
封装代码：BGA封装形状：RECTANGULAR
封装形式：GRID ARRAY并行/串行：PARALLEL
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：2.36 mm最大供电电压 (Vsup)：3.465 V
最小供电电压 (Vsup)：3.135 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：TIN SILVER COPPER
端子形式：BALL端子节距：1.27 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：30
宽度：14 mmBase Number Matches：1

IDT71V65703S80BGGI 数据手册

 浏览型号IDT71V65703S80BGGI的Datasheet PDF文件第2页浏览型号IDT71V65703S80BGGI的Datasheet PDF文件第3页浏览型号IDT71V65703S80BGGI的Datasheet PDF文件第4页浏览型号IDT71V65703S80BGGI的Datasheet PDF文件第5页浏览型号IDT71V65703S80BGGI的Datasheet PDF文件第6页浏览型号IDT71V65703S80BGGI的Datasheet PDF文件第7页 
256K x 36, 512K x 18  
IDT71V65703  
IDT71V65903  
3.3VSynchronousZBT™SRAMs  
3.3V I/O, Burst Counter  
Flow-Through Outputs  
cycle,andonthenextclockcycletheassociateddatacycleoccurs,beit  
read or write.  
TheIDT71V65703/5903containaddress,data-inandcontrolsignal  
registers.Theoutputsareflow-through(nooutputdataregister).Output  
enable is the only asynchronous signal and can be used to disable the  
outputsatanygiventime.  
Features  
◆
256K x 36, 512K x 18 memory configurations  
◆
Supports high performance system speed - 100 MHz  
(7.5 ns Clock-to-Data Access)  
ZBTTM Feature - No dead cycles between write and read  
◆
cycles  
◆
A Clock Enable (CEN) pin allows operation of the IDT71V65703/5903  
tobesuspendedaslongasnecessary.Allsynchronousinputsareignoredwhen  
CENishighandtheinternaldeviceregisterswillholdtheirpreviousvalues.  
There are three chip enable pins (CE1, CE2, CE2) that allow the  
usertodeselectthedevicewhendesired.Ifanyoneofthesethreeisnot  
assertedwhenADV/LDislow,nonewmemoryoperationcanbeinitiated.  
However,anypendingdatatransfers(readsorwrites)willbecompleted.  
Thedatabuswilltri-stateonecycleafterthechipisdeselectedorawrite  
isinitiated.  
TheIDT71V65703/5903haveanon-chipburstcounter.Intheburst  
mode,theIDT71V65703/5903canprovidefourcyclesofdataforasingle  
address presented to the SRAM. The order of the burst sequence is  
defined by the LBO input pin. The LBO pin selects between linear and  
interleaved burst sequence. The ADV/LD signal is used to load a new  
externaladdress(ADV/LD=LOW)orincrementtheinternalburstcounter  
(ADV/LD = HIGH).  
Internally synchronized output buffer enable eliminates the  
need to control OE  
◆
Single R/W (READ/WRITE) control pin  
◆
4-word burst capability (Interleaved or linear)  
Individual byte write (BW1 - BW4) control (May tie active)  
Three chip enables for simple depth expansion  
3.3V power supply (±5%)  
3.3V (±5%) I/O Supply (VDDQ)  
Power down controlled by ZZ input  
Packaged in a JEDEC standard 100-pin plastic thin quad  
◆
◆
◆
◆
◆
◆
flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch  
ball grid array (fBGA).  
Description  
The IDT71V65703/5903 are 3.3V high-speed 9,437,184-bit  
(9 Megabit) synchronous SRAMs organized as 256K x 36 / 512K x 18.  
They are designed to eliminate dead bus cycles when turning the bus  
aroundbetweenreads andwrites,orwrites andreads.Thus theyhave  
been given the name ZBTTM, or Zero Bus Turnaround.  
AddressandcontrolsignalsareappliedtotheSRAMduringoneclock  
TheIDT71V65703/5903SRAMsutilizeIDT’slatesthigh-performance  
CMOSprocessandarepackagedinaJEDECStandard14mmx20mm100-  
pinplasticthinquadflatpack(TQFP), 119 ballgridarray(BGA)and a 165  
fine pitchballgridarray(fBGA).  
PinDescriptionSummary  
A0-A18  
Address Inputs  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
Input  
I/O  
Synchronous  
Synchronous  
Asynchronous  
Synchronous  
Synchronous  
Synchronous  
N/A  
Chip Enables  
CE1, CE2, CE2  
Output Enable  
OE  
R/W  
Read/Write Signal  
Clock Enable  
CEN  
Individual Byte Write Selects  
Clock  
BW1, BW2, BW3, BW4  
CLK  
ADV/LD  
Advance Burst Address/Load New Address  
Linear/Interleaved Burst Order  
Sleep Mode  
Synchronous  
Static  
LBO  
ZZ  
Asynchronous  
Synchronous  
Static  
I/ O0-I/O31, I/OP1-I/OP4  
VDD, VDDQ  
Data Input/Output  
Core Power, I/O Power  
Ground  
Supply  
Supply  
VSS  
Static  
5298 tbl 01  
ZBT and Zero Bus Turnaround are trademarks of Integrated Device Technology, Inc. and the architecture is supported by Micron Technology and Motorola, Inc.  
DECEMBER 2002  
1
©2002IntegratedDeviceTechnology,Inc.  
DSC-5298/03  
1234567...26

中文翻译

下载PDF

与IDT71V65703S80BGGI相关器件

型号 品牌 获取价格 描述 数据表
IDT71V65703S80BGI IDT

获取价格

 		256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs
IDT71V65703S80BQ IDT

获取价格

 		256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs
IDT71V65703S80BQGI IDT

获取价格

 		ZBT SRAM, 256KX36, 8ns, CMOS, PBGA165, 13 X 15 MM, GREEN, FPBGA-165
IDT71V65703S80BQI IDT

获取价格

 		256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs
IDT71V65703S80PF IDT

获取价格

 		256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs
IDT71V65703S80PF8 IDT

获取价格

 		ZBT SRAM, 256KX36, 8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, MO-136DJ, PLASTIC, TQFP
IDT71V65703S80PFG IDT

获取价格

 		ZBT SRAM, 256KX36, 8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, MO-136DJ, GREEN, PLASTI
IDT71V65703S80PFG8 IDT

获取价格

 		ZBT SRAM, 256KX36, 8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, MO-136DJ, GREEN, PLASTI
IDT71V65703S80PFI IDT

获取价格

 		256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs
IDT71V65703S80PFI8 IDT

获取价格

 		ZBT SRAM, 256KX36, 8ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, MO-136DJ, PLASTIC, TQFP

与IDT71V65703S80BGGI相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证