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IDT71V424L10YG8 PDF预览

IDT71V424L10YG8

更新时间: 2024-11-06 14:42:47
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
9页 85K
描述
Standard SRAM, 512KX8, 10ns, CMOS, PDSO36, 0.400 INCH, ROHS COMPLIANT, PLASTIC, SOJ-36

IDT71V424L10YG8 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOJ
包装说明:SOJ,针数:36
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.16
Is Samacsys:N最长访问时间:10 ns
JESD-30 代码:R-PDSO-J36JESD-609代码:e3
长度:23.495 mm内存密度:4194304 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:36
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOJ
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:3.683 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:MATTE TIN端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:10.16 mm
Base Number Matches:1

IDT71V424L10YG8 数据手册

 浏览型号IDT71V424L10YG8的Datasheet PDF文件第2页浏览型号IDT71V424L10YG8的Datasheet PDF文件第3页浏览型号IDT71V424L10YG8的Datasheet PDF文件第4页浏览型号IDT71V424L10YG8的Datasheet PDF文件第5页浏览型号IDT71V424L10YG8的Datasheet PDF文件第6页浏览型号IDT71V424L10YG8的Datasheet PDF文件第7页 
IDT71V424S  
IDT71V424L  
3.3V CMOS Static RAM  
4 Meg (512K x 8-Bit)  
Features  
Description  
512K x 8 advanced high-speed CMOS Static RAM  
JEDEC Center Power / GND pinout for reduced noise  
Equal access and cycle times  
TheIDT71V424isa4,194,304-bithigh-speedStaticRAMorganized  
as512Kx8.Itisfabricatedusinghigh-perfomance,high-reliabilityCMOS  
technology.Thisstate-of-the-arttechnology,combinedwithinnovative  
circuitdesigntechniques,providesacost-effectivesolutionforhigh-speed  
memoryneeds.  
— CommercialandIndustrial:10/12/15ns  
Single 3.3V power supply  
One Chip Select plus one Output Enable pin  
Bidirectional data inputs and outputs directly  
TTL-compatible  
Low power consumption via chip deselect  
Available in 36-pin, 400 mil plastic SOJ package and  
44-pin, 400 mil TSOP.  
TheIDT71V424hasanoutputenablepinwhichoperatesasfastas  
5ns,withaddressaccesstimesasfastas10ns.Allbidirectionalinputsand  
outputs of the IDT71V424 are TTL-compatible and operation is from a  
single3.3Vsupply.Fullystaticasynchronouscircuitryisused,requiring  
no clocks or refresh for operation.  
TheIDT71V424ispackagedina36-pin,400milPlasticSOJand44-  
pin, 400milTSOP.  
FunctionalBlockDiagram  
A0  
4,194,304-BIT  
MEMORY ARRAY  
ADDRESS  
DECODER  
A18  
8
8
I/O0 - I/O7  
I/O CONTROL  
8
WE  
OE  
CS  
CONTROL  
LOGIC  
3622 drw 01  
SEPTEMBER 2013  
1
©2013IntegratedDeviceTechnology,Inc.  
DSC-3622/10  

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