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IDT7132LA25L48B PDF预览

IDT7132LA25L48B

更新时间： 2024-11-15 23:05:03
品牌 Logo 应用领域
艾迪悌 - IDT 存储内存集成电路静态存储器
页数 文件大小 规格书
11页 176K
描述
HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM

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中文翻译

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IDT7132LA25L48B 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：LCC
包装说明：QCCN, LCC48,.56SQ,40针数：48
Reach Compliance Code：not_compliantECCN代码：3A001.A.2.C
HTS代码：8542.32.00.41风险等级：5.21
Is Samacsys：N最长访问时间：25 ns
其他特性：AUTOMATIC POWER-DOWN; BATTERY BACKUPI/O 类型：COMMON
JESD-30 代码：S-CQCC-N48JESD-609代码：e0
长度：14.3002 mm内存密度：16384 bit
内存集成电路类型：DUAL-PORT SRAM内存宽度：8
功能数量：1端口数量：2
端子数量：48字数：2048 words
字数代码：2000工作模式：ASYNCHRONOUS
最高工作温度：125 °C最低工作温度：-55 °C
组织：2KX8输出特性：3-STATE
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：QCCN
封装等效代码：LCC48,.56SQ,40封装形状：SQUARE
封装形式：CHIP CARRIER并行/串行：PARALLEL
峰值回流温度（摄氏度）：225电源：5 V
认证状态：Not Qualified筛选级别：MIL-PRF-38535
座面最大高度：3.048 mm最大待机电流：0.004 A
最小待机电流：2 V子类别：SRAMs
最大压摆率：0.22 mA最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：NO LEAD端子节距：1.016 mm
端子位置：QUAD处于峰值回流温度下的最长时间：30
宽度：14.3002 mmBase Number Matches：1

IDT7132LA25L48B 数据手册

 浏览型号IDT7132LA25L48B的Datasheet PDF文件第2页浏览型号IDT7132LA25L48B的Datasheet PDF文件第3页浏览型号IDT7132LA25L48B的Datasheet PDF文件第4页浏览型号IDT7132LA25L48B的Datasheet PDF文件第5页浏览型号IDT7132LA25L48B的Datasheet PDF文件第6页浏览型号IDT7132LA25L48B的Datasheet PDF文件第7页 
IDT7132SA/LA  
IDT7142SA/LA  
HIGH-SPEED  
2K x 8 DUAL-PORT  
STATIC RAM  
Integrated Device Technology, Inc.  
FEATURES:  
DESCRIPTION:  
• High-speed access  
The IDT7132/IDT7142 are high-speed 2K x 8 Dual-Port  
Static RAMs. The IDT7132 is designed to be used as a stand-  
alone 8-bit Dual-Port RAM or as a “MASTER” Dual-Port RAM  
together with the IDT7142 “SLAVE” Dual-Port in 16-bit-or-  
more word width systems. Using the IDT MASTER/SLAVE  
Dual-Port RAM approach in 16-or-more-bit memory system  
applications results in full-speed, error-free operation without  
the need for additional discrete logic.  
— Military: 25/35/55/100ns (max.)  
— Commercial: 25/35/55/100ns (max.)  
— Commercial: 20ns only in PLCC for 7132  
• Low-power operation  
— IDT7132/42SA  
Active: 550mW (typ.)  
Standby: 5mW (typ.)  
— IDT7132/42LA  
Both devices provide two independent ports with separate  
control, address, and l/O pins that permit independent, asyn-  
chronousaccessforreadsorwritestoanylocationinmemory.  
An automatic power down feature, controlled by CE permits  
Active: 550mW (typ.)  
Standby: 1mW (typ.)  
• Fully asynchronous operation from either port  
• MASTER IDT7132 easily expands data bus width to 16-or- the on-chip circuitry of each port to enter a very low standby  
more bits using SLAVE IDT7142  
power mode.  
• On-chip port arbitration logic (IDT7132 only)  
• BUSY output flag on IDT7132; BUSY input on IDT7142  
• Battery backup operation —2V data retention  
• TTL-compatible, single 5V ±10% power supply  
• Available in popular hermetic and plastic packages  
• Military product compliant to MIL-STD, Class B  
• Standard Military Drawing # 5962-87002  
Fabricated using IDT’s CMOS high-performance technol-  
ogy, these devices typically operate on only 550mW of power.  
Low-power (LA) versions offer battery backup data retention  
capability, with each Dual-Port typically consuming 200µW  
from a 2V battery.  
The IDT7132/7142 devices are packaged in a 48-pin  
sidebraze or plastic DIPs, 48-pin LCCs, 52-pin PLCCs, and  
• Industrial temperature range (–40°C to +85°C) is available, 48-lead flatpacks. Military grade product is manufactured in  
tested to miliary electrical specifications  
compliance with the latest revision of MIL-STD-883, Class B,  
making it ideally suited to military temperature applications  
demanding the highest level of performance and reliability.  
FUNCTIONAL BLOCK DIAGRAM  
OER  
OEL  
CE  
L
CE  
R
R/WR  
R/W  
L
I/O0L- I/O7L  
I/O0R-I/O7R  
(1,2)  
I/O  
Control  
I/O  
Control  
BUSY (1,2)  
L
BUSY  
R
A
10L  
0L  
A
A
10R  
0R  
Address  
Decoder  
MEMORY  
ARRAY  
Address  
Decoder  
A
11  
11  
NOTES:  
1. IDT7132 (MASTER): BUSY is open  
drain output and requires pullup  
resistor of 270Ω.  
ARBITRATION  
LOGIC  
CEL  
CER  
IDT7142 (SLAVE): BUSY is input.  
2. Open drain output: requires pullup  
resistor of 270Ω.  
2692 drw 01  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
OCTOBER 1996  
©1996 Integrated Device Technology, Inc.  
DSC-2692/8  
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.  
6.02  
1
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IDT7132LA25L48B 替代型号

型号 品牌 替代类型 描述 数据表
IDT7132SA25L48B IDT

功能相似

 HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM

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IDT7132LA25L48GI IDT

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 		Dual-Port SRAM, 2KX8, 25ns, CMOS, CQCC48, 0.570 X 0.570 INCH, 0.680 INCH HEIGHT, GREEN, MS
IDT7132LA25L48I IDT

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IDT7132LA25L52 ETC

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IDT7132LA25L52B ETC

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IDT7132LA25P IDT

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 		HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM
IDT7132LA25PB IDT

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 		HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM
IDT7132LA25PGI IDT

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IDT7132LA25PI IDT

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