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IDT70V9279L12PRFI8 PDF预览

IDT70V9279L12PRFI8

更新时间: 2024-11-18 14:51:23
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器输出元件内存集成电路
页数 文件大小 规格书
17页 199K
描述
Dual-Port SRAM, 32KX16, 12ns, CMOS, PQFP128, TQFP-128

IDT70V9279L12PRFI8 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:TQFP-128针数:128
Reach Compliance Code:compliantECCN代码:3A991.B.2.B
HTS代码:8542.32.00.41风险等级:5.29
Is Samacsys:N最长访问时间:12 ns
其他特性:PIPELINED OUTPUT MODE; SELF-TIMED WRITE CYCLEJESD-30 代码:R-PQFP-G128
JESD-609代码:e0长度:20 mm
内存密度:524288 bit内存集成电路类型:DUAL-PORT SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端子数量:128
字数:32768 words字数代码:32000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:32KX16
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:RECTANGULAR封装形式:FLATPACK, LOW PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):240
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:20宽度:14 mm
Base Number Matches:1

IDT70V9279L12PRFI8 数据手册

 浏览型号IDT70V9279L12PRFI8的Datasheet PDF文件第2页浏览型号IDT70V9279L12PRFI8的Datasheet PDF文件第3页浏览型号IDT70V9279L12PRFI8的Datasheet PDF文件第4页浏览型号IDT70V9279L12PRFI8的Datasheet PDF文件第5页浏览型号IDT70V9279L12PRFI8的Datasheet PDF文件第6页浏览型号IDT70V9279L12PRFI8的Datasheet PDF文件第7页 
IDT70V9279S/L  
HIGH-SPEED 3.3V 32K x 16  
SYNCHRONOUS  
DUAL-PORT STATIC RAM  
Features:  
True Dual-Ported memory cells which allow simultaneous  
access of the same memory location  
High-speed clock to data access  
– Commercial:9/12/15ns (max.)  
Low-power operation  
Full synchronous operation on both ports  
4ns setup to clock and 1ns hold on all control, data,  
andaddress inputs  
Data input, address, and control registers  
Fast 9ns clock to data out in the Pipelined output mode  
IDT70V9279S  
Self-timedwriteallowsfastcycletime  
Active:429mW(typ.)  
Standby: 3.3mW (typ.)  
IDT70V9279L  
Active:429mW(typ.)  
Standby: 1.32mW (typ.)  
Flow-through or Pipelined output mode on either port via  
the FT/PIPE pin  
15ns cycle time, 66MHz operation in Pipelined output mode  
Separate upper-byte and lower-byte controls for  
multiplexed bus and bus matching compatibility  
LVTTL- compatible, single 3.3V (±0.3V) power supply  
Industrial temperature range (–40°C to +85°C) is  
available for selected speeds  
Available in a 128-pin Thin Quad Flatpack (TQFP) package  
Counter enable and reset features  
Dual chip enables allow for depth expansion without  
additional logic  
FunctionalBlockDiagram  
R/WL  
UBL  
R/WR  
UBR  
CE0L  
CE1L  
CE0R  
CE1R  
1
1
0
0
0/1  
0/1  
LBL  
LBR  
OEL  
OE  
R
1a 0a  
a
0a 1a  
1b 0b  
0b 1b  
b
0/1  
b
0/1  
FT/PIPER  
FT/PIPEL  
I/O8L-I/O15L  
I/O0L-I/O7L  
a
,
I/O8R-I/O15R  
I/O0R-I/O7R  
I/O  
Control  
I/O  
Control  
A14R  
A14L  
Counter/  
Address  
Reg.  
Counter/  
Address  
Reg.  
MEMORY  
ARRAY  
A0R  
A0L  
CLKL  
ADSL  
CLKR  
ADS  
CNTENR  
R
CNTENL  
CNTRSTL  
CNTRST  
R
3743 drw 01  
JANUARY 2001  
1
©2000IntegratedDeviceTechnology,Inc.  
DSC 3743/6  

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