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IDT70V5378S200BG PDF预览

IDT70V5378S200BG

更新时间: 2024-10-27 22:08:27
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
29页 395K
描述
3.3V 64/32K X 18 SYNCHRONOUS FOURPORT STATIC RAM

IDT70V5378S200BG 数据手册

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3.3V 64/32K X 18  
IDT70V5388/78  
SYNCHRONOUS  
FOURPORT™ STATIC RAM  
Features  
Counter wrap-around control  
– Internal mask register controls counter wrap-around  
– Counter-Interrupt flags to indicate wrap-around  
Counter readback on address lines  
Mask register readback on address lines  
Global Master reset for all ports  
Dual Chip Enables on all ports for easy depth expansion  
Separate upper-word and lower-word controls on all ports  
272-BGA package (27mm x 27mm 1.27mm ball pitch) and  
256-BGA package (17mm x 17mm 1.0mm ball pitch)  
Commercial and Industrial temperature ranges  
JTAG boundary scan  
True four-ported memory cells which allow simultaneous  
access of the same memory location  
Synchronous Pipelined device  
– 64/32K x 18 organization  
Pipelined output mode allows fast 200MHz operation  
High Bandwidth up to 14 Gbps (200MHz x 18 bits wide x  
4 ports)  
LVTTL I/O interface  
High-speed clock to data access 3.0ns (max.)  
3.3V Low operating power  
Interrupt flags for message passing  
Width and depth expansion capabilities  
MBIST (Memory Built-In Self Test) controller  
Port - 1 Logic Block Diagram(2)  
R/  
W
P1  
0
1
1/0  
UBP1  
CE0P1  
CE1P1  
LBP1  
OEP1  
I/O9P1 - I/O17P1  
I/O0P1 - I/O8P1  
Port 1  
I/O  
Control  
TRST  
TMS  
JTAG  
TCK  
TDI  
Controller  
MBIST  
TDO  
CLKMBIST  
Addr.  
Read  
Back  
Port 1  
Readback  
Register  
MRST  
(1)  
A
0P1 - A15P1  
Port 1  
Mask  
,
Register  
CNTRDP1  
MKRDP1  
MKLDP1  
Port 1  
Address  
Decode  
64KX18  
Memory  
Array  
Priority  
Decision  
Logic  
Port 1  
CNTINCP1  
CNTLDP1  
CNTRSTP1  
Counter/  
Address  
Register  
CLKP1  
R/  
WP1  
Port 1  
Interrupt  
Logic  
CE0P1  
CE1P1  
CLKP1  
MRST  
CNTINTP1  
INTP1  
MRST  
5649 drw 01  
NOTE:  
1. A15x is a NC for IDT70V5378.  
2. Port 2, Port 3, and Port 4 Logic Blocks are similar to Port 1 Logic Blocks.  
AUGUST 2003  
1
DSC-5649/3  
©2003IntegratedDeviceTechnology,Inc.  

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