Datasheet > IDT70V3319S166PRF9

IDT70V3319S166PRF9

更新时间： 2024-11-07 10:01:51

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
23页	239K
描述
Dual-Port SRAM, 256KX18, 12ns, CMOS, PQFP128, 14 X 20 MM, 1.40 MM HEIGHT, TQFP-128

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HIGH-SPEED 3.3V

256/128K x 18

SYNCHRONOUS

IDT70V3319/99S

DUAL-PORT STATIC RAM

WITH 3.3V OR 2.5V INTERFACE

Features:

◆

– Data input, address, byte enable and control registers

True Dual-Port memory cells which allow simultaneous

access of the same memory location

High-speed data access

– Self-timedwriteallowsfastcycletime

Separate byte controls for multiplexed bus and bus

matching compatibility

Dual Cycle Deselect (DCD) for Pipelined Output mode

LVTTL- compatible, single 3.3V (±150mV) power supply

for core

LVTTL compatible, selectable 3.3V (±150mV) or 2.5V

(±100mV) power supply for I/Os and control signals on

each port

Industrial temperature range (-40°C to +85°C) is

available at 133MHz.

Available in a 128-pin Thin Quad Flatpack, 208-pin fine

pitch Ball Grid Array, and 256-pin Ball

GridArray

Supports JTAG features compliant to IEEE 1149.1

– Due to limited pin count, JTAG is not supported on the

128-pin TQFP package.

◆

– Commercial: 3.6ns (166MHz)/4.2ns (133MHz) (max.)

– Industrial: 4.2ns (133MHz) (max.)

Selectable Pipelined or Flow-Through output mode

– Due to limited pin count PL/FToption is not supported

on the 128-pin TQFP package. Device is pipelined

outputs only on each port.

Counter enable and repeat features

Dual chip enables allow for depth expansion without

additional logic

◆

Full synchronous operation on both ports

– 6ns cycle time, 166MHzoperation(6Gbps bandwidth)

– Fast 3.6ns clock to data out

◆

– 1.7ns setup to clock and 0.5ns hold on all control, data, and

address inputs @ 166MHz

Functional Block Diagram

UBL

UBR

LBL

LBR

FT/PIPE

1b 0b

1a 0a

0a 1a

0b 1b

FT/PIPER

1/0

R/WL

R/WR

CE0L

CE0R

CE1R

CE1L

B B

W W

1/0

Dout0-8_L

Dout9-17_L

Dout0-8_R

Dout9-17_R

OEL

OER

0a 1a

1b 0b 1a 0a

0b 1b

0/1

FT/PIPE

0/1

256K x 18

MEMORY

ARRAY

I/O0R - I/O17R

Din_L

I/O0L - I/O17L

Din_R

CLKR

CLKL

(1)

17L

17R

Counter/

Address

Reg.

Counter/

Address

Reg.

A0L

ADDR_R

ADDR_L

REPEAT

ADS

CNTEN

REPEAT

ADS

CNTEN

5623 tbl 01

TDI

TCK

TMS

TRST

JTAG

NOTE:

1. A¹⁷is a NC for IDT70V3399.

TDO

MAY 2003

DSC 5623/7

12 3 4 5 6 7...23

中文翻译

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与IDT70V3319S166PRF9相关器件

型号	品牌	获取价格	描述	数据表
IDT70V3319S166PRFG	IDT	获取价格	Dual-Port SRAM, 256KX18, 3.6ns, CMOS, PQFP128, 14 X 20 MM X 1.4 MM, GREEN, PLASTIC, TQFP-1
IDT70V3319S166PRFG8	IDT	获取价格	Dual-Port SRAM, 256KX18, 12ns, CMOS, PQFP128, TQFP-128
IDT70V3319S166PRFGI	IDT	获取价格	Dual-Port SRAM, 256KX18, 3.6ns, CMOS, PQFP128, 14 X 20 MM X 1.4 MM, GREEN, PLASTIC, TQFP-1
IDT70V3319S166PRFI	IDT	获取价格	HIGH-SPEED 3.3V 256/128K x 18 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE
IDT70V3379S	IDT	获取价格	HIGH-SPEED 3.3V 32K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTE
IDT70V3379S4BC	IDT	获取价格	HIGH-SPEED 3.3V 32K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTE
IDT70V3379S4BC8	IDT	获取价格	Dual-Port SRAM, 32KX18, 4.2ns, CMOS, PBGA256, BGA-256
IDT70V3379S4BCI	IDT	获取价格	HIGH-SPEED 3.3V 32K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTE
IDT70V3379S4BF	IDT	获取价格	HIGH-SPEED 3.3V 32K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTE
IDT70V3379S4BFG	IDT	获取价格	Dual-Port SRAM, 32KX18, 4.2ns, CMOS, CBGA208, 15 X 15 MM X 1.4 MM, 0.80 MM PITCH, GREEN, F

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