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IDT7005L15PF PDF预览

IDT7005L15PF

更新时间: 2024-11-06 22:51:31
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
20页 265K
描述
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM

IDT7005L15PF 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFP
包装说明:14 X 14 MM, 1.40 MM HEIGHT, TQFP-64针数:64
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.62
最长访问时间:15 ns其他特性:INTERRUPT FLAG; AUTOMATIC POWER-DOWN; SEMAPHORE; BATTERY BACKUP
I/O 类型:COMMONJESD-30 代码:S-PQFP-G64
JESD-609代码:e0长度:14 mm
内存密度:65536 bit内存集成电路类型:DUAL-PORT SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端口数量:2
端子数量:64字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:8KX8输出特性:3-STATE
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP64,.66SQ,32
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):240
电源:5 V认证状态:Not Qualified
座面最大高度:1.6 mm最大待机电流:0.0015 A
最小待机电流:2 V子类别:SRAMs
最大压摆率:0.26 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD处于峰值回流温度下的最长时间:20
宽度:14 mmBase Number Matches:1

IDT7005L15PF 数据手册

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IDT7005S/L  
HIGH-SPEED  
8K x 8 DUAL-PORT  
STATIC RAM  
Integrated Device Technology, Inc.  
• Busy and Interrupt Flags  
• On-chip port arbitration logic  
• Full on-chip hardware support of Semaphore signaling  
between ports  
FEATURES:  
• True Dual-Ported memory cells which allow simulta-  
neous access of the same memory location  
• High-speed access  
• Fully asynchronous operation from either port  
• Devices are capable of withstanding greater than 2001V  
electrostatic discharge  
— Military: 20/25/35/55/70ns (max.)  
— Commercial:15/17/20/25/35/55ns (max.)  
• Low-power operation  
• Battery backup operation—2V data retention  
• TTL-compatible, single 5V (±10%) power supply  
• Available in 68-pin PGA, 68-pin quad flatpack, 68-pin  
PLCC, and a 64-pin TQFP  
• Industrial temperature range (–40°C to +85°C) is avail-  
able, tested to military electrical specifications  
— IDT7005S  
Active: 750mW (typ.)  
Standby: 5mW (typ.)  
— IDT7005L  
Active: 750mW (typ.)  
Standby: 1mW (typ.)  
• IDT7005 easily expands data bus width to 16 bits or  
more using the Master/Slave select when cascading  
more than one device  
• M/S = H for BUSY output flag on Master,  
M/S = L for BUSY input on Slave  
DESCRIPTION:  
The IDT7005 is a high-speed 8K x 8 Dual-Port Static RAM.  
The IDT7005 is designed to be used as a stand-alone Dual-  
Port RAM or as a combination MASTER/SLAVE Dual-Port  
FUNCTIONAL BLOCK DIAGRAM  
OER  
OEL  
CE  
L
CE  
R
R/WR  
R/W  
L
I/O0L- I/O7L  
I/O0R-I/O7R  
(1,2)  
I/O  
Control  
I/O  
Control  
BUSY (1,2)  
L
BUSY  
R
A
12L  
A
12R  
0R  
Address  
Decoder  
MEMORY  
ARRAY  
Address  
Decoder  
A
0L  
A
13  
13  
ARBITRATION  
INTERRUPT  
SEMAPHORE  
LOGIC  
NOTES:  
CE  
OE  
R/W  
L
CE  
OE  
R/W  
R
1. (MASTER):  
BUSY is output;  
(SLAVE): BUSY  
is input.  
R
L
R
L
2. BUSY outputs  
and INT outputs  
are non-tri-stated  
push-pull.  
SEM  
L
SEM  
R
INT (2)  
L
(2)  
INTR  
2738 drw 01  
M/S  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
OCTOBER 1996  
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.  
©1996 Integrated Device Technology, Inc.  
DSC-2738/6  
1
6.06  

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