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IDT54FCT139CTDB PDF预览

IDT54FCT139CTDB

更新时间: 2024-11-05 22:25:51
品牌 Logo 应用领域
艾迪悌 - IDT 解码器驱动器逻辑集成电路
页数 文件大小 规格书
5页 107K
描述
FAST CMOS DUAL 1-OF-4 DECODER WITH ENABLE

IDT54FCT139CTDB 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:DIP包装说明:CERAMIC, DIP-16
针数:16Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.37Is Samacsys:N
系列:FCT输入调节:STANDARD
JESD-30 代码:R-GDIP-T16JESD-609代码:e0
长度:20.066 mm负载电容(CL):50 pF
逻辑集成电路类型:OTHER DECODER/DRIVER最大I(ol):0.032 A
功能数量:2端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:INVERTED封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:6.2 ns传播延迟(tpd):6.2 ns
认证状态:Not Qualified筛选级别:MIL-STD-883 Class B
座面最大高度:5.08 mm子类别:Decoder/Drivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

IDT54FCT139CTDB 数据手册

 浏览型号IDT54FCT139CTDB的Datasheet PDF文件第2页浏览型号IDT54FCT139CTDB的Datasheet PDF文件第3页浏览型号IDT54FCT139CTDB的Datasheet PDF文件第4页浏览型号IDT54FCT139CTDB的Datasheet PDF文件第5页 
IDT54/74FCT139T/AT/CT  
FAST CMOS DUAL  
1-OF-4 DECODER  
WITH ENABLE  
Integrated Device Technology, Inc.  
FEATURES:  
• Std., A and C speed grades  
• Low input and output leakage 1µA (max.)  
• CMOS power levels  
• True TTL input and output compatibility  
– VOH = 3.3V (typ.)  
DESCRIPTION:  
The IDT54/74FCT139T/AT/CT are dual 1-of-4 decoders  
built using an advanced dual metal CMOS technology. These  
devices have two independent decoders, each of which  
accept two binary weighted inputs (A0-A1) and provide four  
mutually exclusive active LOW outputs (O0-O3). Each de-  
coder has an active LOW enable (E). When E is HIGH, all  
outputs are forced HIGH.  
– VOL = 0.3V (typ.)  
• High drive outputs (-15mA IOH, 48mA IOL)  
• Meets or exceeds JEDEC standard 18 specifications  
• Product available in Radiation Tolerant and Radiation  
Enhanced versions  
• Military product compliant to MIL-STD-883, Class B  
and DESC listed (dual marked)  
• Available in DIP, SOIC, QSOP, CERPACK and  
LCC packages  
FUNCTIONAL BLOCK DIAGRAM  
PIN CONFIGURATIONS  
E
a
1
16  
15  
14  
13  
12  
11  
10  
9
V
E
A
A
CC  
b
Ea  
A0a  
A1a  
Eb  
A0b  
A1b  
A
A
0a  
1a  
2
3
4
P16-1  
D16-1  
SO16-1  
SO16-7  
&
0b  
1b  
O
O
O
0a  
1a  
2a  
5
6
7
8
O
0b  
O
O
O
1b  
2b  
3b  
E16-1  
O
3a  
GND  
2566 drw 02  
DIP/SOIC/QSOP/CERPACK  
TOP VIEW  
INDEX  
O0a  
O1a  
O2a  
O3a  
O0b  
O1b  
O2b  
O3b  
2566 drw 01  
3
2
20 19  
1
A1a  
4
5
6
7
8
18  
A0b  
O0a  
17  
16  
15  
14  
A1b  
NC  
O0b  
O1b  
NC  
O1a  
O2a  
L20-2  
9 10 11 12 13  
2566 drw 03  
LCC  
TOP VIEW  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
APRIL 1995  
1995 Integrated Device Technology, Inc.  
6.4  
DSC-4218/3  
1

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