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ICS84329AM-01T PDF预览

ICS84329AM-01T

更新时间: 2024-11-03 14:51:19
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
19页 194K
描述
Clock Generator, 700MHz, PDSO28, 7.5 X 18.05 MM, 2.25 MM HEIGHT, MS-013, MO-119, SOIC-28

ICS84329AM-01T 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.88
Is Samacsys:NJESD-30 代码:R-PDSO-G28
JESD-609代码:e0长度:18.05 mm
端子数量:28最高工作温度:70 °C
最低工作温度:最大输出时钟频率:700 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):225主时钟/晶体标称频率:25 MHz
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

ICS84329AM-01T 数据手册

 浏览型号ICS84329AM-01T的Datasheet PDF文件第2页浏览型号ICS84329AM-01T的Datasheet PDF文件第3页浏览型号ICS84329AM-01T的Datasheet PDF文件第4页浏览型号ICS84329AM-01T的Datasheet PDF文件第5页浏览型号ICS84329AM-01T的Datasheet PDF文件第6页浏览型号ICS84329AM-01T的Datasheet PDF文件第7页 
ICS84329-01  
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V  
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER  
Integrated  
Circuit  
Systems, Incꢀ  
GENERAL DESCRIPTION  
FEATURES  
The ICS84329-01 is a general purpose, single out-  
Fully integrated PLL, no external loop filter requirements  
1 differential 3.3V LVPECLoutput  
put high frequency synthesizer and a member of  
HiPerClockS™  
the HiPerClockS™ family of High Performance  
Clock Solutions from ICS. The VCO operates at a  
frequency range of 200MHz to 700MHz. The VCO  
Crystal oscillator interface  
Output frequency range: 25MHz to 700MHz  
VCO range: 200MHz to 700MHz  
frequency is programmed in steps equal to the value of the  
crystal frequency divided by 16. The VCO and output frequency  
can be programmed using the serial or parallel interfaces to  
the configuration logic. The output can be configured to divide  
the VCO frequency by 1, 2, 4, and 8. Output frequency steps  
as small as 125KHz to 1MHz can be achieved using a 16MHz  
crystal depending on the output dividers.  
Parallel interface for programming counter  
and output dividers during power-up  
Serial 3 wire interface  
RMS Period jitter: 5.5ps (maximum)  
Cycle-to-cycle jitter: 35ps (maximum)  
3.3V supply voltage  
0°C to 70°C ambient operating temperature  
Pin compatible with the SY89429  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
M0  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
nP_LOAD  
VCC  
XTAL2  
XTAL1  
nc  
M1  
M2  
2
3
M3  
4
M4  
M5  
5
6
XTAL1  
OSC  
nc  
M6  
M7  
7
8
VCCA  
XTAL2  
S_LOAD  
S_DATA  
S_CLOCK  
VCC  
÷ 16  
M8  
9
N0  
N1  
10  
11  
12  
13  
14  
PLL  
VEE  
TEST  
VCC  
FOUT  
nFOUT  
VEE  
PHASE DETECTOR  
÷1  
÷2  
÷4  
÷8  
1
0
FOUT  
nFOUT  
VCO  
ICS84329-01  
÷ M  
28-Lead SOIC  
7.5mm x 18.05mm x 2.25mm package body  
M Package  
Top View  
S_LOAD  
S_DATA  
S_CLOCK  
nP_LOAD  
CONFIGURATION  
INTERFACE  
LOGIC  
TEST  
M0:M8  
N0:N1  
25 24 23 22 21 20 19  
S_CLOCK  
26  
18  
N1  
N0  
M8  
M7  
M6  
M5  
M4  
S_DATA  
S_LOAD  
VCCA  
27  
28  
1
17  
16  
15  
14  
13  
12  
ICS84329-01  
28-Lead PLCC  
11.6mm x 11.4mm x 4.1mm  
V Package  
nc  
2
nc  
3
Top View  
XTAL1  
4
5
6
7
8
9 10 11  
84329AM-01  
www.icst.com/products/hiperclocks.html  
REV. C APRIL 3, 2003  
1

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