Datasheet > ICS581G-02T

ICS581G-02T

更新时间： 2024-11-08 22:23:47

品牌	Logo	应用领域
矽成 - ICSI		复用器逻辑集成电路光电二极管驱动时钟
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6页	95K
描述
Zero-Delay Glitch-Free Clock Multiplexer

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ICS581G-02T 数据手册

ICS581-01, -02

Zero-Delay Glitch-Free Clock Multiplexer

Description

Features

The ICS581-01 and ICS581-02 are glitch free,

Phase Locked Loop (PLL) based clock multiplexers

(mux) with zero delay from input to output. They

each have 4 low skew outputs which can be

configured as a single output, 3 outputs or 4

outputs. The ICS581-01 allows user control over

the mux switching. The ICS581-02 has automatic

switching between the 2 clock inputs.

• Tiny 16 pin TSSOP package

• No short pulses or glitches on output. Operates to

200 MHz

• User controlled (ICS581-01) or automatic, timed

(ICS581-02) switch

• Low skew outputs

• Ideal for systems with backup or redundant clocks

• Zero delay, input to output

The ICS581-01 and -02 are members of the ICS

Clock Blocks™ family of clock generation,

synchronization, and distribution devices. For a

non-PLL based clock mux, see the ICS580-01.

• 50% output duty cycle allows duty cycle correction

• Spread Smart™ technology works with spread

spectrum parts

Block Diagrams

CLK1

INA

INB

OE0

CLK2

CLK3

SELA

PLL

FBIN

OE0

OE1

S0, S1

CLK4

ICS581-01

OE1

External Feedback

NO_INA

Transition

Detector

÷48

÷3

CLK1

CLK2

CLK3

DIV

INA

INB

OE0

PLL

FBIN

OE0

OE1

S0, S1

ICS581-02

CLK4

OE1

External Feedback

MDS 581-01, 581-02 A

Revision 041100

Printed 11/14/00

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com

12 3 4 5 6

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