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IBM11N8645HB-50T PDF预览

IBM11N8645HB-50T

更新时间： 2024-10-28 20:04:07
品牌 Logo 应用领域
国际商业机器公司 - IBM 动态存储器内存集成电路
页数 文件大小 规格书
31页 564K
描述
EDO DRAM Module, 8MX64, 50ns, CMOS, DIMM-168

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IBM11N8645HB-50T 技术参数

生命周期：Obsolete零件包装代码：DIMM
包装说明：,针数：168
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.32.00.28风险等级：5.84
访问模式：FAST PAGE WITH EDO最长访问时间：50 ns
JESD-30 代码：R-XDMA-N168内存密度：536870912 bit
内存集成电路类型：EDO DRAM MODULE内存宽度：64
功能数量：1端口数量：1
端子数量：168字数：8388608 words
字数代码：8000000工作模式：ASYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：8MX64封装主体材料：UNSPECIFIED
封装形状：RECTANGULAR封装形式：MICROELECTRONIC ASSEMBLY
认证状态：Not Qualified最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：3.3 V
表面贴装：NO技术：CMOS
温度等级：COMMERCIAL端子形式：NO LEAD
端子位置：DUALBase Number Matches：1

IBM11N8645HB-50T 数据手册

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Discontinued (9/98 - last order; 3/99 last ship)  
IBM11M4730C4M  
x 72 E12/10, 5.0V, Au.  
IBM11N8645H  
IBM11N8735H  
8M x 64/72 DRAM Module  
Features  
• 168 Pin JEDEC Standard, Unbuffered 8 Byte  
Dual In-line Memory Module  
• Optimized for byte-write non-parity, or ECC  
applications  
• 8Mx64, 8Mx72 Extended Data Out Mode  
DIMMS  
• System Performance Benefits:  
- Non buffered for increased performance  
- Reduced noise (35 V /V pins)  
- Byte write, byte read accesses  
- Serial PDs  
SS CC  
• Performance:  
-50  
-60  
RAS Access Time  
CAS Access Time  
Access Time From Address  
Cycle Time  
50ns  
13ns  
25ns  
60ns  
15ns  
30ns  
tRAC  
tCAC  
• Extended Data Out (EDO) Mode, Read-Modify-  
Write Cycles  
tAA  
• Refresh Modes: RAS-Only, CBR and Hidden  
Refresh  
84ns 104ns  
20ns 25ns  
tRC  
tHPC  
EDO Mode Cycle Time  
• 4096 refresh cycles distributed across 64ms  
• 12/11 addressing (Row/Column)  
• Card size: 5.25" x 1.0" x 0.157"  
• DRAMS in TSOP Package  
• Inputs and outputs are LVTTL (3.3V) compatible  
• Single 3.3V ± 0.3V Power Supply  
• Gold contacts  
Description  
IBM11N8645H/IBM11N8735H are industry standard  
168-pin 8-byte Dual In-line Memory Modules  
(DIMMs) which are organized as 8Mx64 and 8Mx72  
high speed memory arrays designed with EDO  
DRAMs for non-parity or ECC applications. The  
DIMMs use 8 (x64) or 9 (x72) 8Mx8 EDO DRAMs in  
TSOP packages. The use of EDO DRAMs allows for  
a reduction in Page Mode Cycle time from 40ns  
(Fast Page) to 20ns for 50ns DRAM modules.  
clock data between the master (system logic) and  
the slave EEPROM device (DIMM). The EEPROM  
device address pins (SA0-2) are brought out to the  
DIMM tabs to allow 8 unique DIMM/EEPROM  
addresses. The first 128 bytes are utilized by the  
DIMM manufacturer and the second 128 bytes of  
serial PD data are available to the customer.  
All IBM 168-pin DIMMs provide a high performance,  
flexible 8-byte interface in a 5.25" long space-saving  
footprint. Related products include the buffered  
DIMMs (x64 non- parity and x72 ECC Optmized) for  
applications which can benefit from the on-card buff-  
ers.  
The DIMMs use serial presence detects imple-  
mented via a serial EEPROM using the two-pin IIC  
protocol. This communication protocol uses Clock  
(SCL) and Data I/O (SDA) lines to synchronously  
Card Outline  
(Front)  
(Back)  
1
85  
10 11  
94 95  
84  
168  
40 41  
124 125  
©IBM Corporation. All rights reserved.  
Use is further subject to the provisions at the end of this document.  
54H8530.E24352A  
Revised 4/98  
1234567...31

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与IBM11N8645HB-50T相关器件

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IBM11N8645HB-60T IBM

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IBM11N8735BB-60 ETC

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IBM11N8735BB-60J IBM

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IBM11N8735BB-70 ETC

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IBM11N8735CB-60 ETC

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IBM11N8735CB-60J IBM

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 		EDO DRAM Module, 8MX72, 60ns, CMOS, DIMM-168
IBM11N8735CB-70 ETC

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 		x72 EDO Page Mode DRAM Module
IBM11N8735HB-50T IBM

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 		EDO DRAM Module, 8MX72, 50ns, CMOS, DIMM-168
IBM11N8735HB-60 ETC

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 		x72 EDO Page Mode DRAM Module

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