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I795-6503H-20.000 PDF预览

I795-6503H-20.000

更新时间: 2024-11-07 07:04:35
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描述
LVCMOS Output Clock Oscillator,

I795-6503H-20.000 数据手册

 浏览型号I795-6503H-20.000的Datasheet PDF文件第2页浏览型号I795-6503H-20.000的Datasheet PDF文件第3页 
3.2 mm x 2.5 mm 6 Pads SMD TCXO or TC/VCXO Oscillator  
I595 / I795 Series  
Product Features:  
Applications:  
Server & Storage  
CDMA / WCDMA  
802.11 / Wifi  
Advanced PLL Technology  
0.8 pSec Phase Jitter typ.  
Fast Delivery  
3.20±0.10  
RoHS and Lead Free Compliant  
T1/E1. T3/E3  
2.50±0.10  
2.00±0.20  
Frequency  
LVCMOS  
10.000 MHz to 245.000 MHz  
LVPECL  
LVDS  
10.000 MHz to 1450.000 MHz  
10.000 MHz to 1450.000 MHz  
1.60±0.10  
Output Levels  
LVCMOS  
Logic “0” = 10% of Vcc max  
Logic “1” = 90% of Vcc min  
LVPECL  
LVDS  
Logic “0” = Vcc – 1.85 Vmin, Vcc – 1.60 V max  
Logic “1” = Vcc – 1.03 V min, Vcc -0.60 V max  
Logic “0” = 1.10 V typ, 0.90 V min  
Logic “1” = 1.40 V typ, 1.60 V max  
2.10  
.50  
.90  
2
1
6
3
4
Load  
LVCMOS  
LVPECL  
LVDS  
Duty Cycle  
Rise / Fall Time  
LVCMOS  
LVPECL  
LVDS  
15pF  
Differential  
Differential  
50% ±5% (Ref to 50% of waveform)  
5
.72  
.68  
.50  
.50  
1.5 nSec typ, 3.0 nSec max (10% to 90% of waveform)  
0.2 nSec typ, 0.5 nSec max (20% to 80% of waveform)  
0.2 nSec typ, 0.4 nSec max (20% to 80% of waveform)  
2.56  
Frequency Stability  
Initial Calibration Tolerance  
vs. Temperature  
vs. Aging  
vs. Voltage  
vs. Load  
1.60  
±1.0 ppm max at +25ºC ±2ºC at time of shipment  
See Stability in Part Number Guide  
±1.0 ppm max per year at +25ºC  
±0.2 ppm max for a ±5% change in Supply Voltage (Vcc)  
±0.2 ppm max for a ±10% change in load  
±1.0 ppm max after 1 reflow and measured 24 hours after.  
5 mSec max  
+2.50 VDC , +3.30 VDC See Part Number Guide  
See table 1 sheet 2  
18 mA typ  
1.10  
.75  
Suggested  
Land Pattern  
vs. Reflow  
Start-up Time  
Supply Voltage (±5%)  
Current  
Current with Output  
Disabled  
Pin Connections  
Voltage Control  
N/C or Ground  
N/C or Enable / Disable  
TCVCXO  
TCXO  
Pin 1  
Pin 2  
Pin 3  
Pin 4  
Ground  
Output  
Phase Noise (RMS)  
0.8 pSec typ (12.000 kHz to 20.000 MHz)  
Less than 400nSec (1.875 kHz to 21.000 MHz)  
N/C  
LVCMOS  
LVPECL  
LVDS  
Pin 5  
Pin 6  
Complementary Output  
Temperature Range  
Operating  
Storage  
See Operating Temperature in Part Number Guide  
-55ºC to +150ºC  
Supply Voltage (Vcc)  
Notes:  
Dimensions in mm  
1. An 0.01 µF and 10 µF bypass capacitors are recommended between Vcc (Pin 6) and GND  
(Pin 3) to minimize power supply noise  
Part Number Guide  
Sample Part Number: I595-63Q8H-20.000  
Operating  
Temperature  
Stability  
(in ppm)  
Enable / Disable  
Frequency  
(Pin 2)  
Package  
Input Voltage  
Output  
3 = +3.3 V  
6 = +2.5 V  
1 = 0ºC to +70ºC  
0 = ±1.5*  
3 = LVCMOS  
8 = LVDS  
H = Enable  
O = N/C  
2 = -40ºC to =85ºC  
3 = -20ºC to +70ºC  
5 = -30ºC to +85ºC  
P = ±2.0*  
Q = ±2.5*  
R = ±3.0  
J = ±5.0  
I595 = TCXO  
9 = LVPECL  
20.000 MHz  
I795 = TCVCXO  
* Not available for all temperature ranges  
Rev: 3/28/15_D  
Page 1 of 3  
ILSI America Phone 775-851-8880 Fax 775-851-8882 email: e-mail@ilsiamerica.com ●  
www.ilsiamerica.com  
Specifications subject to change without notice  

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