HY628100A Series
128Kx8bit CMOS SRAM
DESCRIPTION
FEATURES
The HY628100A is a high speed, low power and
1M bit CMOS Static Random Access Memory
organized as 131,072 words by 8bit. The
HY628100A uses high performance CMOS
process technology and designed for high speed
low power circuit technology. It is particulary well
suited for used in high density low power system
application. This device has a data retention
mode that guarantees data to remain valid at a
minimum power supply voltage of 2.0V.
·
·
·
Fully static operation and Tri-state output
TTL compatible inputs and outputs
Battery backup(L/LL-part)
- 2.0V(min) data retention
Standard pin configuration
·
- 32pin 525mil SOP
- 32pin 8x20mm TSOP-I(Standard)
Product
No
HY628100A
Voltage
(V)
Speed
(ns)
55/70/85
Operation
Current(mA)
10
Standby Current(uA)
Temperature
(°C)
L
100
LL
20
5.0
1mA
0~70
Comment : 50ns is available with 30pF test load.
PIN CONNECTION
NC
A16
A14
A12
A7
Vcc
A15
CS2
/WE
A13
A8
1
2
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
/OE
A11
A9
32
1
2
3
4
5
6
7
8
9
3
/CS1
DQ8
DQ7
DQ6
DQ5
DQ4
Vss
30
29
28
27
26
25
24
4
A13
/WE
CS2
A15
Vcc
NC
5
A6
6
A5
A9
7
A11
/OE
A10
/CS1
I/O8
I/O7
I/O6
I/O5
I/O4
A4
8
A3
9
A2
10
11
12
13
14
15
16
A16
DQ3
A1
11
12
13
14
15
16
22
21
20
19
18
17
A0
A12
A7
A6
A5
A4
DQ1
A0
I/O1
I/O2
I/O3
Vss
A1
A2
A3
SOP
TSOP-I(Standard)
PIN DESCRIPTION
BLOCK DIAGRAM
Pin Name
Pin Function
Chip Select 1
Chip Select 2
ROW DECODER
I/O1
A0
/CS1
CS2
/WE
Write Enable
Output Enable
Address Input
Data Input/Output
Power(5.0V)
Ground
MEMORY ARRAY
1024x1024
/OE
A0 ~ A16
I/O1 ~ I/O8
Vcc
A16
I/O8
/CS1
CS2
/OE
Vss
/WE
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.05 /Feb.99
Hyundai Semiconductor