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HY57V281620ELT-5 PDF预览

HY57V281620ELT-5

更新时间: 2024-02-20 06:59:50
品牌 Logo 应用领域
海力士 - HYNIX 动态存储器
页数 文件大小 规格书
13页 127K
描述
128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O

HY57V281620ELT-5 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:TSOP2, TSOP54,.46,32
针数:54Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.02
风险等级:5.89访问模式:FOUR BANK PAGE BURST
最长访问时间:4.5 ns其他特性:AUTO/SELF REFRESH
最大时钟频率 (fCLK):200 MHzI/O 类型:COMMON
交错的突发长度:1,2,4,8JESD-30 代码:R-PDSO-G54
JESD-609代码:e0长度:22.238 mm
内存密度:134217728 bit内存集成电路类型:SYNCHRONOUS DRAM
内存宽度:16功能数量:1
端口数量:1端子数量:54
字数:8388608 words字数代码:8000000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:8MX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP54,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified刷新周期:4096
座面最大高度:1.194 mm自我刷新:YES
连续突发长度:1,2,4,8,FP最大待机电流:0.002 A
子类别:DRAMs最大压摆率:0.21 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10.16 mm
Base Number Matches:1

HY57V281620ELT-5 数据手册

 浏览型号HY57V281620ELT-5的Datasheet PDF文件第4页浏览型号HY57V281620ELT-5的Datasheet PDF文件第5页浏览型号HY57V281620ELT-5的Datasheet PDF文件第6页浏览型号HY57V281620ELT-5的Datasheet PDF文件第8页浏览型号HY57V281620ELT-5的Datasheet PDF文件第9页浏览型号HY57V281620ELT-5的Datasheet PDF文件第10页 
Synchronous DRAM Memory 128Mbit (8Mx16bit)  
HY57V281620E(L)T(P) Series  
ABSOLUTE MAXIMUM RATING  
Parameter  
Symbol  
Rating  
Unit  
oC  
Ambient Temperature  
TA  
0 ~ 70  
oC  
V
V
mA  
Storage Temperature  
TSTG  
VIN, VOUT  
VDD, VDDQ  
IOS  
-55 ~ 125  
-1.0 ~ 4.6  
-1.0 ~ 4.6  
50  
Voltage on Any Pin relative to VSS  
Voltage on VDD relative to VSS  
Short Circuit Output Current  
Power Dissipation  
PD  
1
W
oC / Sec  
Soldering Temperature / Time  
TSOLDER  
260 / 10  
o
DC OPERATING CONDITION (TA= 0 to 70 C)  
Parameter  
Power Supply Voltage  
Input High Voltage  
Input Low Voltage  
Symbol  
VDD, VDDQ  
VIH  
Min.  
3.0  
2.0  
Typ  
3.3  
3.0  
-
Max  
Unit  
Note  
1
1, 2  
1, 3  
3.6  
VDDQ + 0.3  
0.8  
V
V
V
VIL  
-0.3  
Note: 1. All voltages are referenced to VSS = 0V  
2. VIH(max) is acceptable 5.6V AC pulse width with <=3ns of duration.  
3. VIL(min) is acceptable -2.0V AC pulse width with <=3ns of duration  
o
AC OPERATING TEST CONDITION (TA= 0 to 70 C, VDD=3.3±0.3V, VSS=0V)  
Parameter  
AC Input High / Low Level Voltage  
Input Timing Measurement Reference Level Voltage  
Input Rise / Fall Time  
Output Timing Measurement Reference Level Voltage  
Output Load Capacitance for Access Time Measurement  
Symbol  
VIH / VIL  
Vtrip  
Value  
2.4 / 0.4  
1.4  
Unit  
V
V
ns  
V
pF  
Note  
tR / tF  
Voutref  
CL  
1
1.4  
50  
1
Note 1.  
Vtt = 1.4V  
Vtt = 1.4V  
RT = 500Ω  
RT = 50  
Output  
Output  
50pF  
Z0 = 50  
50pF  
DC Output Load Circuit  
AC Output Load Circuit  
Rev. 1.1 / Jan. 2005  
7

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