HV860
Audible Noise Reduction
The EL lamp, when lit, emits an audible noise. This is due The HV860 employs a proprietary circuit to help minimize
to EL lamp construction. The audible noise generated by the the EL lamp’s audible noise by using a single resistor, RREG
EL lamp can be a major problem for applications where the as shown in Figure 5.
EL lamp is held close to the ear, such as cellular phones.
,
Figure 5: Typical Application Circuit for Audible Noise Reduction
VIN
CIN
LX
D
RREG
2
3
5
CS
VREG
VDD
VREF LX
CS
10
12
7
VDD
RSW
CDD
RSW-OSC
REL-OSC
EN
9
8
VA
VB
1
EL
Lamp
REL
1.5V = On
0V = Off
11
GND
4
HV860K7
How to Minimize EL Lamp Audible Noise
The audible noise from the EL lamp can be minimized with to ground. EL lamp noise can be minimized without much
the proper selection of RREG. R
is connected between loss in brightness by setting the RC time constant to be
the VREF and VREG pins. VREG hasRaEnG internal 60pF capacitor approximately 1/12TH of the EL frequency’s period.
EL Lamp Dimming using PWM
This section describes the method of dimming the EL lamp. resistor. An n-channel open drain PWM signal is used to pull
Reducing the voltage amplitude at the VREG pin will reduce the 10kΩ resistor to ground. The effective voltage on the
the voltage on the VCS pin, which will effectively reduce the
V
pin will be proportional to the duty cycle of the PWM
peak the peak voltage the EL lamp sees. Figure 5 shows a siRgEnGal. The PWM operating frequency can be anywhere
circuit to dim the lamp by changing the duty cycle of a PWM between 20kHz to 100kHz.
signal. A 10kΩ resistor is connected in series with a 3.3MΩ
Figure 6: PWM Dimming Circuit
+
VIN
4.7μF
-
220μH
Open Drain
n-channel
PWM Signal
(Cooper Inductor SD3814-221)
10kΩ
3
VREF
3.3MΩ
5
LX
CS
2
BAS21
7
3.3nF
200V
VREG
VDD
10
12
+
-
1.0MΩ
2.0MΩ
VDD
0.1μF
RSW-OSC
REL-OSC
EN
9
8
VA
VB
1
EL Lamp
On = 1.5V
Off = 0V
11
GND
4
HV860K7
NR040306
6