Datasheet > HV57908_07

HV57908_07

更新时间： 2024-11-06 03:43:07

品牌	Logo	应用领域
超科 - SUPERTEX		转换器
页数	文件大小	规格书
7页	652K
描述
8MHz, 64-Channel Serial to Parallel Converter with Push-Pull Outputs

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HV57908_07 数据手册

HV57908

8MHz, 64-Channel Serial to Parallel Converter

with Push-Pull Outputs

Features

General Description

► HVCMOS^®technology

The HV57908 is a low voltage serial to high voltage

parallel converter with push-pull outputs. The device has

been designed for use as a driver for EL displays. It can

also be used in any application requiring multiple output

high voltage current sourcing and sinking capability such

as driving plasma panels, vacuum ﬂuorescent displays, or

large matrix LCD displays.

► 5V CMS Logic

► Output voltage up to +80V

► Low power level shifting

► 8MHz data rate

► Latched data outputs

► Forward and reverse shifting options (DIR pin)

► Diode to V_PPallows efﬁcient power recovery

► Outputs may be hot switched

The device consists of a 64-bit shift register, 64 latches and

control logic to perform the polarity select and blanking of

the outputs. HVOUT1 is connected to the ﬁrst stage of the

ﬁrst shift register through the polarity and blanking logic.

Data is shifted through the shift registers on the logic low

to high transition of the clock. The DIR pin causes CCW

shifting when connected to GND, and CW shifting when

connected to VDD. A data output buffer is provided for

cascading devices. This output reﬂects the current status

of the last bit of the shift register (HVOUT64). Operation

of the shift register is not affected by the LE (latch enable),

BL (blanking), or the POL (polarity) inputs. Transfer of data

from the shift registers to the latches occurs when the LE

input is high. The data in the latches is stored when the LE

is low.

Functional Block Diagram

POL

VPP

DIOA

HVOUT1

Clock

HVOUT2

•

64-bit

Static Shift

64 Latches

60 Additional

Outputs

DIR

•

HVOUT63

HVOUT64

DIOB

12 3 4 5 6 7

中文翻译

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