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HV57009PG-G PDF预览

HV57009PG-G

更新时间： 2024-09-30 03:15:23
品牌 Logo 应用领域
超科 - SUPERTEX 转换器
页数 文件大小 规格书
8页 802K
描述
64-Channel Serial to Parallel Converter with P-Channel Open Drain Controllable Output Current

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中文翻译

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HV57009PG-G 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Transferred零件包装代码：QFP
包装说明：QFP,针数：80
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.7
数据输入模式：SERIAL显示模式：DOT MATRIX
接口集成电路类型：DC PLASMA DISPLAY DRIVERJESD-30 代码：R-PQFP-G80
JESD-609代码：e3长度：20 mm
复用显示功能：NO功能数量：1
区段数：64端子数量：80
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装形状：RECTANGULAR封装形式：FLATPACK
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：3.4 mm最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：0.8 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：14 mm最小 fmax：8 MHz
Base Number Matches：1

HV57009PG-G 数据手册

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HV57009  
64-Channel Serial to Parallel Converter  
with P-Channel Open Drain Controllable Output Current  
Features  
General Description  
The HV570 is a low-voltage serial to high-voltage parallel  
converter with P-channel open drain outputs. This device  
has been designed for use as a driver for plasma panels.  
► HVCMOS® technology  
► 5.0V CMOS Logic  
► Output voltage up to -85V  
► Output current source control  
► 16MHz equivalent data rate  
► Latched data outputs  
► Foreward and reverse shifting options (DIR pin)  
► Diode to VDD allows efficient power recovery  
The device has two parallel 32-bit shift registers, permitting  
data rates twice the speed of one (they are clocked together).  
There are also 64 latches and control logic to perform the  
blanking of the outputs. HVOUT1 is connected to the first stage  
of the first shift register through the blanking logic. Data is  
shifted through the shift registers on the logic low to high  
transition of the clock. The DIR pin causes CCW shifting  
when connected to V , and CW shifting when connected to  
VDD. A data output buSffSer is provided for cascading devices.  
This output reflects the current status of the last bit of the  
shift register (HV 64). Operation of the shift register is  
not affected by thOeUTLE (latch enable), or the BL (blanking)  
inputs. Transfer of data from the shift registers to latches  
occurs when the LE input is high. The data in the latches is  
stored when LE is low.  
The HV570 has 64 channels of output constant current  
sourcing capability. They are adjustable from 0.1 to 2.0mA  
through one external resistor or a current source.  
Functional Block Diagram  
LE  
BL  
DD  
DI/O2A  
DI/O1A  
I/O  
HVOUT1  
HVOUT2  
HVOUT3  
Latch  
Latch  
DIR  
CLK  
SR1  
•
•
•
HVOUT32  
HVOUT33  
Latch  
Latch  
HVOUT34  
HVOUT35  
SR2  
•
•
•
HVOUT64  
Programmable  
I/O  
Current  
DI/O2B  
DI/O1B  
VSS  
VBP +IN -IN  
Note:  
Each SR (shift register) provides 32 outputs. SR1 supplies outputs 1 to 32 and SR2 supplies outputs 33 to 64.  
12345678

中文翻译

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HV57009PG-G 替代型号

型号 品牌 替代类型 描述 数据表
HV57009PG SUPERTEX

完全替代

 64-Channel Serial To Parallel Converter With P-Channel Open Drain Controllable Output Curr

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