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HMC856LC5TR PDF预览

HMC856LC5TR

更新时间: 2024-02-26 12:20:30
品牌 Logo 应用领域
亚德诺 - ADI ATM异步传输模式电信电信集成电路
页数 文件大小 规格书
14页 647K
描述
28 Gbps, 5-Bit, Digital Time Delay with Programmable Output Voltage

HMC856LC5TR 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active包装说明:HQCCN,
针数:32Reach Compliance Code:compliant
风险等级:5.4JESD-30 代码:S-CQCC-N32
长度:5 mm湿度敏感等级:3
功能数量:1端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:HQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG
峰值回流温度(摄氏度):260座面最大高度:1.12 mm
标称供电电压:3.3 V表面贴装:YES
电信集成电路类型:ATM/SONET/SDH CLOCK RECOVERY CIRCUIT温度等级:INDUSTRIAL
端子面层:Tungsten/Nickel/Gold (W/Ni/Au)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:5 mm
Base Number Matches:1

HMC856LC5TR 数据手册

 浏览型号HMC856LC5TR的Datasheet PDF文件第2页浏览型号HMC856LC5TR的Datasheet PDF文件第3页浏览型号HMC856LC5TR的Datasheet PDF文件第4页浏览型号HMC856LC5TR的Datasheet PDF文件第5页浏览型号HMC856LC5TR的Datasheet PDF文件第6页浏览型号HMC856LC5TR的Datasheet PDF文件第7页 
28 Gbps, 5-Bit, Digital Time Delay with  
Programmable Output Voltage  
Data Sheet  
HMC856  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Differential and single-ended operation  
Supports data rates up to 28 Gbps  
Fast rise/fall time: 20 ps/18 ps  
Low power consumption: 610 mW typical  
Programmable differential  
Output voltage swing: 500 mV p-p to 1350 mV p-p  
Single supply: −3.3 V  
5 mm × 5 mm, 32-terminal ceramic leadless chip carrier (LCC)  
package: 25 mm2  
GND  
I+  
1
2
3
4
5
6
7
8
24 GND  
23 O+  
HMC856  
50Ω  
50Ω  
50Ω  
50Ω  
DELAY  
I–  
22 O–  
GND  
GND  
B0+  
B0–  
NC  
21 GND  
20 GND  
19 B4+  
18 B4–  
17 NC  
600Ω  
600Ω  
APPLICATIONS  
SONET OC-192  
600Ω 600Ω  
600Ω  
High speed serial logic  
Clock and data recovery  
Broadband test and measurement equipment  
Frequency synthesis  
PACKAGE  
BASE  
V
EE  
Matched timing  
Figure 1.  
GENERAL DESCRIPTION  
The HMC856 is a wideband time delay device with a 5-bit  
digital control designed for timing compensation or clock skew  
management applications. The time delay provides nearly  
100 ps (maximum) of delay range with 3 ps resolution and  
supports 28 Gbps data. The monotonic delay is compensated  
for stable operation over both power supply and temperature  
variation.  
outputs are source terminated to 50 Ω and can also be ac or dc-  
coupled. Connect outputs directly to a 50 Ω ground terminated  
system or drive devices with CML logic input. The control lines,  
B4 to B0, are differential CML inputs terminated with 600 Ω to  
the positive rail, which supports lower power control options.  
The HMC856 features an output level control pin, VR, that  
allows loss compensation or signal level optimization. The  
HMC856 operates from a single −3.3 V supply and is available  
in a 5 mm × 5 mm LCC package.  
All differential inputs to the HMC856 are current mode logic  
(CML) and terminated on chip with 50 Ω to the positive supply  
ground, GND, and can be ac or dc-coupled. The differential CML  
Rev. C  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2016 Analog Devices, Inc. All rights reserved.  
www.analog.com  
 
 
 
 

HMC856LC5TR 替代型号

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