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HMC

更新时间: 2024-11-10 10:53:31
品牌 Logo 应用领域
禾伸堂 - HOLYSTONECAPS 电容器
页数 文件大小 规格书
3页 260K
描述
Multilayer Ceramic Chip Capacitors for High Temperature Applications

HMC 数据手册

 浏览型号HMC的Datasheet PDF文件第2页浏览型号HMC的Datasheet PDF文件第3页 
HMC Series-High Temperature Stacked Capacitors  
Holy Stone  
Multilayer Ceramic Chip Capacitors for High  
Temperature Applications  
[High Temperature Stacked Capacitors]  
HMC Series  
MLCC Design, Suitable for High CV Applications that Require Elevated Operating Temperatures  
‹ Applications  
‹ Features  
‰ High temperature ratings (150˚ through 250˚C)  
‰Stacked design offers the high capacitance  
similar to Tantalum but with extremely low ESR  
advantage.  
‰ ‘J’, ‘L’ and ‘N’ Leaded configuration provide  
mechanical and thermal stress relief.  
‰ Capacitance values up to 8.5µF  
‰ Voltage from 50V to 1000V.  
‰ Power supplies  
‰ DC-DC converters  
‰ Surge protection  
‰ Industrial control circuits  
‰ Snubbers  
‰ Filtering, smoothing, and decoupling application  
‰ Down-Hole applications  
‰ Under the hood  
‰Jet engine controls  
‰Other high operating temperature applications  
‰ NP0 and X8R dielectric.  
‰ HIREL screening available.  
‹ Summary of Specifications  
Operating Temperature  
Rated Voltage  
-55 to +150 Ԩ, 175 ˚C, 200 ˚C, and 250 ˚C  
50Vdc to 1000Vdc  
X8R : ± 15%  
Temperature Coefficient of  
Capacitance  
-55 to +150 Ԩ (EIA Class )  
-55 to 125 ˚C (EIA Class I)  
NP0 : +/- 30 ppm  
Capacitance Range  
Dissipation Factor :  
Insulation Resistance  
Aging  
X8R : 14nF to 8.5uF NP0 : 5.6 nF to 400 nF  
X8R : 2.5%max. at 1KHz NP0: Q> 1000 at 1KHz  
10Gor 500/C whichever is smaller  
X8R : 2.5% per decade of time NP0: negligible  
Dielectric Withstanding Voltage  
V 50V  
; 250% Rated Voltage  
100V V <500V ; 200% Rated Voltage  
500V V <1KV ; 150% Rated Voltage  
1000V = 120% Rated Voltage  
Tolerance  
± 5% ~ ± 20% tolerances  
‹ How To Order  
501  
Rated  
T
HMC  
49  
J
H
224  
K
H
01  
Product  
Code  
Stack and  
Size  
Lead  
Configuration  
Material  
Capacitance Tolerance  
(pF)  
Packaging  
Special Test Special  
Requirement Requirement  
Voltage  
HMC:  
High  
temperature stack  
Stacked  
Capacitors Second Digit:  
Chip Size  
The first digit: Ex.:  
# of chips in J :J Lead for  
Ex.:  
H: X8R  
N: NP0  
Ex.:  
Ex.:  
Ex.:  
B: Bulk  
Blank:  
Blank:  
No special  
103:10x103 J: +/-5.0%  
224:22x104 K: +/- 10%  
475:47x105 M: +/- 20%  
050: 50Vdc T:Tape&Reel Standard  
101: 100Vdc W: Waffle electrical test requirement  
201: 200Vdc  
501: 500Vdc  
102:1000Vdc  
h=0.070”  
L :L Lead for  
h=0.070”  
pack  
H:  
Hi-Rel  
Testing  
01~99:  
Customer  
special  
N:Straight  
Lead  
6: 1812  
requirement  
7: 2220  
8: 1825  
P :J Lead for  
h=0.045”  
9: 2225  
S:L Lead for  
h=0.045”  
Revision date : 2010.07.16  
- 71 -  

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