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HM628511H PDF预览

HM628511H

更新时间: 2024-11-19 22:35:47
品牌 Logo 应用领域
日立 - HITACHI 静态存储器
页数 文件大小 规格书
13页 76K
描述
4M High Speed SRAM (512-kword x 8-bit)

HM628511H 数据手册

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HM628511H Series  
4M High Speed SRAM (512-kword × 8-bit)  
ADE-203-762D (Z)  
Rev. 1.0  
Sep. 15, 1998  
Description  
The HM628511H Series is a 4-Mbit high speed static RAM organized 512-k word × 8-bit. It has realized  
high speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell)and high  
speed circuit designing technology. It is most appropriate for the application which requires high speed, high  
density memory and wide bit width configuration, such as cache and buffer memory in system. It is packaged  
in 400-mil 36-pin plastic SOJ.  
Features  
Single 5.0 V supply : 5.0 V ± 10 %  
Access time 10 /12 /15 ns (max)  
Completely static memory  
No clock or timing strobe required  
Equal access and cycle times  
Directly TTL compatible  
All inputs and outputs  
Operating current : 180 / 160 / 140 mA (max)  
TTL standby current : 70 / 60 / 50 mA (max)  
CMOS standby current : 5 mA (max)  
: 1.2 mA (max) (L-version)  
Data retension current: 0.8 mA (max) (L-version)  
Data retension voltage: 2 V (min) (L-version)  
Center VCC and VSS type pinout  

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