Datasheet > HM628511HCJP-12

HM628511HCJP-12

更新时间： 2024-11-19 23:56:19

品牌	Logo	应用领域
其他 - ETC		内存集成电路静态存储器光电二极管
页数	文件大小	规格书
1页	62K
描述
SRAM: Notes on Usage Technical Update/Device

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HM628511HCJP-12 数据手册

date: 2002/10/04

HITACHI SEMICONDUCTOR TECHNICAL UPDATE

Classification

Memory

No TN-M62-112A/E

Rev

of Production

Spec change

Classification of 2.

Supplement of Documents

Limitation of Use

THEME

SRAM: Notes on Usage

Information

Change of Mask

Change of Production Line

Lot No.

Effective Date

Hitachi IC memory datasheets

ADE-203-1196B(Z)/1198B(Z)/1199B(Z)/

1200C(Z)/1294D(Z)/1202C(Z)/1263A(Z)

/1283A(Z)/1304A(Z)/1305A(Z)

All 4-Mbit fast

SRAM C-mask

products

PRODUCT

NAME

Reference

Documents

All Lots

Permanent

As the operating speeds of SRAM products rise, securing the various design margins is becoming more

difficult. Accordingly, there is an increasing possibility of noise from the input-signal or power-supply

lines acting as an obstacle to the normal operation of SRAM products. To prevent malfunctions in 4-Mbit

fast SRAM (C-mask) products, please note the following points.

1. Announcement

In executing a write-with-verify operations with a 4-Mbit fast SRAM (C-mask) product, incorrect data

may be read because of noise, etc., even when the data has been written correctly (see figure 1 and note

1). This problem does not arise with a further read operation. If you are having problems of the type

described or your project may be subject to such problems, refer to the points below for the appropriate

countermeasures.

2. Countermeasures

Please apply countermeasures (1) and (2) below according to your situation.

(1) Avoid executing the read for verification in the same cycle as the write operation it follows. Verify the

written data after inputting an address or switching the /CS signal.

(2) Please ensure that your design is not subject to adverse effects because of distortion or skewing of the

Din input waveform (figure 2). Drive /WE low (write) after determining the data on Din (see figure 3).

*1: Write verify : After data is written within the same

ADD

address cycle, perform data-read operation.

Fixed to a low level

/CS

/OE

/WE

Din

STRB

Input threshold voltage

Read operation

Figure 1. Write Verify Timing

/WE

Din

Distortion of input waveform

After the Din data is

determined, drive /WE low.

Din waveform skew

Time

Figure 2 Din Input Waveform

Figure 3 Write Verify Timing (Countermeasure Applied)

1/1

中文翻译

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与HM628511HCJP-12相关器件

型号	品牌	获取价格	描述	数据表
HM628511HCJPI-12	RENESAS	获取价格	Wide Temperature Range Version 4M High Speed
HM628511HCLJP-10	HITACHI	获取价格	4M High Speed SRAM (512-kword x 8-bit)
HM628511HCLJP-12	ETC	获取价格	Instructions for Using SRAM Devices Technical Update/Device
HM628511HI	HITACHI	获取价格	4M High Speed SRAM (512-kword x 8-bit)
HM628511HJP-10	HITACHI	获取价格	4M High Speed SRAM (512-kword x 8-bit)
HM628511HJP-12	HITACHI	获取价格	4M High Speed SRAM (512-kword x 8-bit)
HM628511HJP-15	HITACHI	获取价格	4M High Speed SRAM (512-kword x 8-bit)
HM628511HJPI-12	HITACHI	获取价格	4M High Speed SRAM (512-kword x 8-bit)
HM628511HJPI-15	HITACHI	获取价格	4M High Speed SRAM (512-kword x 8-bit)
HM628511HLJP-10	HITACHI	获取价格	4M High Speed SRAM (512-kword x 8-bit)

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