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HM628511HCJP-10 PDF预览

HM628511HCJP-10

更新时间: 2024-09-29 22:32:55
品牌 Logo 应用领域
日立 - HITACHI 静态存储器
页数 文件大小 规格书
14页 69K
描述
4M High Speed SRAM (512-kword x 8-bit)

HM628511HCJP-10 数据手册

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HM628511HC Series  
4M High Speed SRAM (512-kword × 8-bit)  
ADE-203-1197 (Z)  
Preliminary  
Rev. 0.0  
Nov. 9, 2000  
Description  
The HM628511HC Series is a 4-Mbit high speed static RAM organized 512-k word × 8-bit. It has realized  
high speed access time by employing CMOS process (6-transistor memory cell)and high speed circuit  
designing technology. It is most appropriate for the application which requires high speed, high density  
memory and wide bit width configuration, such as cache and buffer memory in system. It is packaged in 400-  
mil 36-pin plastic SOJ.  
Features  
Single 5.0 V supply: 5.0 V ± 10 %  
Access time: 10 ns (max)  
Completely static memory  
No clock or timing strobe required  
Equal access and cycle times  
Directly TTL compatible  
All inputs and outputs  
Operating current: 140 mA (max)  
TTL standby current: 40 mA (max)  
CMOS standby current : 5 mA (max)  
: 1.2 mA (max) (L-version)  
Data retension current: 0.8 mA (max) (L-version)  
Data retension voltage: 2 V (min) (L-version)  
Center VCC and VSS type pinout  
Preliminary: The specification of this device are subject to change without notice. Please contact your  
nearest Hitachi’s Sales Dept. regarding specification.  

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