HIP9011
®
Data Sheet
January 6, 2006
FN4367.2
Engine Knock Signal Processor
The HIP9011 is used to provide a method of detecting
premature detonation often referred to as “Knock or Ping” in
internal combustion engines.
Features
• Two Sensor Inputs
• Microprocessor Programmable
• Accurate and Stable Filter Elements
• Digitally Programmable Gain
• Digitally Programmable Time Constants
The IC is shown in the Simplified Block Diagram. The chip
can select between one of two sensors, if needed for
accurate monitoring or for “V” type engines. Internal control
via the SPI bus is fast enough to switch sensors between
each firing cycle. A programmable bandpass filter
processes the signal from either of the sensor inputs. The
bandpass filter can be selected to optimize the extraction
the engine knock or ping signals from the engine
• Digitally Programmable Filter Characteristics
• On-Chip Crystal Oscillator
• Programmable Frequency Divider
• External Clock Frequencies up to 24MHz
- 4, 5, 6, 8, 10, 12, 16, 20, and 24MHz
background noise. Further single processing is obtained by
full wave rectification of the filtered signal and applying it to
an integrator whose output voltage level is proportional to
the knock signal amplitude. The chip is under
o
o
• Operating Temperature Range -40 C to 125 C
• Pb-Free Plus Anneal Available (RoHS Compliant)
microprocessor control via a SPI interface bus.
Applications
Ordering Information
• Engine Knock Detector Processor
TEMP.
PART
PART
RANGE
PKG.
• Analog Signal Processing Where Controllable Filter
Characteristics are Required
o
NUMBER
MARKING
( C)
PACKAGE DWG. #
HIP9011AB HIP9011AB
-40 to 125
M20.3
M20.3
20 Ld SOIC
HIP9011ABZ HIP9011ABZ -40 to 125
(See Note)
20 Ld SOIC
(Pb-free)
Add “T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Simplified Block Diagram
CH0FB
CH0IN
-
CH0NI
+
PROGRAMMABLE
GAIN
PROGRAMMABLE
OUTPUT
DRIVER INTOUT
AND
PROGRAMMABLE
INTEGRATOR
40 - 600µs
BANDPASS
FILTER
ACTIVE
FULL WAVE
RECTIFIER
CH1FB
STAGE
2- 0.111
SAMPLE
1-20kHz
CH1IN
CH1NI
32 STEPS
AND HOLD
64 STEPS
64 STEPS
-
+
OSCIN
PROGRAMMABLE
DIVIDER
CLOCK
OSCOUT
TO SWITCHED
CAPACITOR
NETWORKS
SCK
CS
POWER SUPPLY
AND
BIAS CIRCUITS
REGISTERS
AND
STATE MACHINE
SI
SO
INT/HOLD
SPI
INTERFACE
VMID
V
GND
DD
TEST
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright Intersil Americas Inc. 1999, 2006. All Rights Reserved
1
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