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HIP4020_05 PDF预览

HIP4020_05

更新时间: 2024-11-16 04:21:47
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英特矽尔 - INTERSIL 驱动器
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9页 280K
描述
Half Amp Full Bridge Power Driver for Small 3V, 5V and 12V DC Motors

HIP4020_05 数据手册

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HIP4020  
®
Data Sheet  
December 20, 2005  
FN3976.3  
Half Amp Full Bridge Power Driver for  
Small 3V, 5V and 12V DC Motors  
Features  
• Two Independent Controlled Complementary MOS Power  
Output Half H-Drivers (Full-Bridge) for Nominal 3V to 12V  
Power Supply Operation  
In the Functional Block Diagram of the HIP4020, the four  
switches and a load are arranged in an H-Configuration so  
that the drive voltage from terminals OUTA and OUTB can  
be cross-switched to change the direction of current flow in  
the load. This is commonly known as 4-quadrant load  
control. As shown in the Block Diagram, switches Q1 and Q4  
are conducting or in an ON state when current flows from  
• Split ±Voltage Power Supply Option for Output Drivers  
• Load Switching Capabilities to 0.5A  
• Single Supply Range +2.5V to +15V  
• Low Standby Current  
V
V
through Q1 to the load, and then through Q4 to terminal  
SSB  
DD  
• CMOS/TTL Compatible Input Logic  
• Over-Temperature Shutdown Protection  
• Overcurrent Limit Protection  
; where load terminal OUTA is at a positive potential  
with respect to OUTB. Switches Q1 and Q4 are operated  
synchronously by the control logic. The control logic  
switches Q3 and Q2 to an open or OFF state when Q1 and  
Q4 are switched ON. To reverse the current flow in the load,  
the switch states are reversed where Q1 and Q4 are OFF  
while Q2 and Q3 are ON. Consequently, current then flows  
• Overcurrent Fault Flag Output  
• Direction, Braking and PWM Control  
• Pb-Free Plus Anneal Available (RoHS Compliant)  
from V  
through Q3, through the load, and through Q2 to  
DD  
terminal V  
Applications  
• DC Motor Driver  
, and load terminal OUTB is then at a positive  
SSA  
potential with respect to OUTA.  
• Relay and Solenoid Drivers  
• Stepper Motor Controller  
• Air Core Gauge Instrument Driver  
• Speedometer Displays  
Terminals ENA and ENB are ENABLE Inputs for the Logic A  
and B Input Controls. The ILF output is an Overcurrent Limit  
Fault Flag Output and indicates a fault condition for either  
Output A or B or both. The V  
and V are the Power  
DD  
SS  
Supply reference terminals for the A and B Control Logic  
Inputs and ILF Output. While the V positive power supply  
Tachometer Displays  
DD  
terminal is internally connected to each bridge driver, the  
and V Power Supply terminals are separate and  
• Remote Power Switch  
V
SSA  
SSB  
• Battery Operated Switch Circuits  
• Logic and Microcontroller Operated Switch  
independent from V and may be more negative than the  
SS  
V
ground reference terminal. The use of level shifters in  
SS  
the gate drive circuitry to the NMOS (low-side) output stages  
allows controlled level shifting of the output drive relative to  
ground.  
Ordering Information  
PART  
PART  
TEMP.  
PKG.  
NUMBER  
MARKING RANGE (°C)  
PACKAGE DWG. #  
HIP4020IB  
HIP4020IB  
-40 to 85 20 Ld SOIC  
M20.3  
M20.3  
HIP4020IBZ HIP4020IBZ  
(Note)  
-40 to 85 20 Ld SOIC  
(Pb-free)  
HIP4020IBZT HIP4020IBZ  
(Note)  
-40 to 85 20 Ld SOIC  
Tape and Reel  
(Pb-free)  
M20.3  
NOTE: Intersil Pb-free plus anneal products employ special Pb-free  
material sets; molding compounds/die attach materials and 100%  
matte tin plate termination finish, which are RoHS compliant and  
compatible with both SnPb and Pb-free soldering operations. Intersil  
Pb-free products are MSL classified at Pb-free peak reflow  
temperatures that meet or exceed the Pb-free requirements of  
IPC/JEDEC J STD-020.  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 1997, 2005. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  

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