HI5741
o
Absolute Maximum ratings T = 25 C
Thermal Information
A
o
Digital Supply Voltage V
to DGND . . . . . . . . . . . . . . . . . . . +5.5V
Thermal Resistance (Typical, Note 1)
θ
( C/W)
CC
JA
Negative Digital Supply Voltage DV to DGND . . . . . . . . . . -5.5V
EE
Negative Analog Supply Voltage AV to AGND, ARTN . . . . . -5.5V
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature
HI5741BIx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150 C
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C
55
70
EE
Digital Input Voltages (D13-D0, CLK) to DGND. . . . . DV
to -0.5V
CC
Internal Reference Output Current. . . . . . . . . . . . . . . . . . . . ±2.5mA
o
o
o
Voltage from CTRL AMP IN to AV . . . . . . . . . . . . . . . . 2.5V to 0V
EE
o
Control Amplifier Output Current . . . . . . . . . . . . . . . . . . . . . ±2.5mA
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300 C
(SOIC - Lead Tips Only)
Reference Input Voltage Range. . . . . . . . . . . . . . . . . .-3.7V to AV
EE
Analog Output Current (I
OUT
) . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Operating Conditions
o
o
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ is measured with the component mounted on an evaluation PC board in free air.
JA
Electrical Specifications AV , DV = -4.94 to -5.46V, V = +4.75 to +5.25V, V = Internal,
REF
EE
T = 25 C
EE
CC
o
A
HI5741BI
= -40 C TO 85 C
o
o
T
A
PARAMETER
SYSTEM PERFORMANCE
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Resolution
14
-
-
1.5
1.75
1.0
75
10
0.05
-
Bits
LSB
LSB
LSB
µA
o
Integral Linearity Error, INL
(Notes 5)
“Best Fit Straight Line”, T = 25 C
A
-
1.0
o
o
“Best Fit Straight Line”, T = -40 C to 85 C
A
-
-
o
Differential Linearity Error, DNL
(Note 5) T = 25 C
A
-
0.5
Offset Error, I
(Note 5)
-
8
OS
Full Scale Gain Error, FSE
Offset Drift Coefficient
(Notes 3, 5)
(Note 4)
-
3.2
%
o
-
-
-
-20.48
-
µA/ C
Full Scale Output Current, I
mA
V
FS
Output Voltage Compliance Range
DYNAMIC CHARACTERISTICS
Throughput Rate
(Note 4)
(Note 4)
-1.25
0
100
-
11
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MSPS
ns
Output Voltage Settling Time
1
R
R
R
= 64Ω (Note 4) - Settling to 0.024%
= 64Ω (Note 4) - Settling to 0.012%
= 64Ω (Note 4)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
L
L
L
( / th Scale Step Across Segment)
16
20
ns
Singlet Glitch Area, GE (Peak)
Output Slew Rate
1
pV•s
V/µs
ps
R = 64Ω, DAC Operating in Latched Mode (Note 4)
1,000
675
470
87
L
Output Rise Time
R = 64Ω, DAC Operating in Latched Mode (Note 4)
L
Output Fall Time
R = 64Ω, DAC Operating in Latched Mode (Note 4)
ps
L
Spurious Free Dynamic Range within a Window
(Note 4)
f
f
f
f
f
f
f
f
f
f
f
f
= 10 MSPS, f
= 20 MSPS, f
= 40 MSPS, f
= 50 MSPS, f
= 80 MSPS, f
= 1.23MHz, 2MHz Span
= 5.055MHz, 2MHz Span
= 16MHz, 10MHz Span
= 10.1MHz, 2MHz Span
= 5.1MHz, 2MHz Span
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
OUT
OUT
OUT
OUT
OUT
77
75
80
78
= 100 MSPS, f
OUT
= 10.1MHz, 2MHz Span
79
Spurious Free Dynamic Range to Nyquist
(Notes 4)
= 10 MSPS, f
= 10 MSPS, f
= 25 MSPS, f
= 50 MSPS, f
= 75 MSPS, f
= 1.023MHz, 5MHz Span
= 2.02MHz, 5MHz Span
= 2.02MHz, 12.5MHz Span
= 5.055MHz, 25MHz Span
= 7.52MHz, 37.5MHz Span
86
OUT
OUT
OUT
OUT
OUT
85
77
74
73
= 100 MSPS, f
= 10.1MHz, 50MHz Span
71
OUT
3-3