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HI5741BIP PDF预览

HI5741BIP

更新时间： 2024-01-01 02:08:50
品牌 Logo 应用领域
英特矽尔 - INTERSIL 转换器
页数 文件大小 规格书
12页 161K
描述
14-Bit, 100 MSPS, High Speed D/A Converter

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HI5741BIP 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DIP包装说明：PLASTIC, MS-011AB, DIP-28
针数：28Reach Compliance Code：not_compliant
ECCN代码：3A001.A.5.BHTS代码：8542.39.00.01
风险等级：5.79最大模拟输出电压：
最小模拟输出电压：-1.25 V转换器类型：D/A CONVERTER
输入位码：BINARY输入格式：PARALLEL, WORD
JESD-30 代码：R-PDIP-T28JESD-609代码：e0
长度：37.4 mm最大线性误差 (EL)：0.0107%
标称负供电电压：-5.2 V位数：14
功能数量：1端子数量：28
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP28,.6封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5,-5.2 V认证状态：Not Qualified
座面最大高度：6.35 mm标称安定时间 (tstl)：0.02 µs
子类别：Other Converters标称供电电压：5 V
表面贴装：NO技术：BICMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：15.24 mmBase Number Matches：1

HI5741BIP 数据手册

 浏览型号HI5741BIP的Datasheet PDF文件第6页浏览型号HI5741BIP的Datasheet PDF文件第7页浏览型号HI5741BIP的Datasheet PDF文件第8页浏览型号HI5741BIP的Datasheet PDF文件第9页浏览型号HI5741BIP的Datasheet PDF文件第10页浏览型号HI5741BIP的Datasheet PDF文件第11页 
HI5741  
Total Harmonic Distortion, THD, is the ratio of the DAC  
tone spacing of this pattern (∆f) is created such that tones 1  
through 4 and 5 through 8 are spaced equally, with tones 4  
and 5 spaced at 2∆f. MTPR is measured as the dynamic  
range from peak power to peak distortion in the 2∆f gap.  
output fundamental to the RMS sum of the harmonics. The  
1
first 5 harmonics are included, and an output filter of / the  
2
clock frequency is used to eliminate alias products.  
Spurious Free Dynamic Range, SFDR, is the amplitude  
difference from a fundamental to the largest harmonically or  
Intermodulation Distortion, IMD, is the measure of the  
sum and difference products produced when a two tone  
input is driven into the D/A. The distortion products created  
will arise at sum and difference frequencies of the two tones.  
IMD can be calculated using the following equation:  
non-harmonically related spur. A sine wave is loaded into the  
1
D/A and the output filtered at / the clock frequency to  
2
eliminate noise from clocking alias terms.  
20Log (RMS of Sum and Difference Distortion Products)  
IMD = ------------------------------------------------------------------------------------------------------------------------------------------------------  
(RMS Amplitude of the Fundamental)  
Multi-Tone Power Ratio, MTPR, is the amplitude difference  
from peak amplitude to peak distortion (either harmonic or  
non-harmonic). An 8 tone pattern is loaded into the D/A. The  
U2  
K9  
33 MSPS  
CLK  
CLK  
C11  
B11  
C10  
TO RF  
UP-CONVERT  
STAGE  
MOD2  
MOD1  
BASEBAND  
BIT  
STREAM  
FILTER  
ENCODER  
U1  
DV  
MOD0  
16  
R
1
V
CC  
CC  
L1  
21  
20  
A11  
I
DACSTRB  
OUT  
PMSEL  
K3  
L2  
L3  
L4  
J5  
K5  
L5  
K6  
J6  
J7  
L7  
L6  
L8  
K8  
L9  
L10  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
64  
F10  
F9  
F11  
H11  
G11  
G9  
D13 (MSB)  
D12  
D11  
D10  
D9  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
SIN15  
SIN14  
SIN13  
SIN12  
SIN11  
SIN10  
SIN9  
SIN8  
SIN7  
SIN6  
SIN5  
SIN4  
SIN3  
SIN2  
SIN1  
SIN0  
ENPOREG  
ENOFREG  
ENCFREG  
ENPHAC  
ENTIREG  
INHOFR  
R
2
I
/
OUT  
64  
24  
25  
C AMP IN  
-5.2V_A  
-5.2V_A  
J11  
G10  
C
0.1µF  
0.01µF  
2
1
INITPAC  
INITTAC  
C AMP OUT  
C
D10  
J10  
TEST  
V
PARSER  
BINFMT  
CC  
26  
23  
19  
CONTROLLER  
K11  
REF OUT  
D0 (LSB)  
R
3
R
B8  
A8  
B6  
B7  
A7  
C7  
C6  
A6  
A5  
C5  
A4  
B4  
A3  
A2  
B3  
A1  
15  
SET  
C15_MSB  
C4  
CLK  
976  
R
4
28  
17  
DGND  
DGND  
C13  
C12  
C11  
C10  
C9  
C8  
C7  
C6  
C5  
C4  
C3  
C2  
C1  
50  
ARET  
27  
22  
AV  
AV  
SS  
EE  
C2  
B1  
C1  
D1  
E3  
E2  
E1  
F2  
F3  
G3  
G1  
G2  
H1  
H2  
J1  
COS15  
COS14  
COS13  
COS12  
COS11  
COS10  
COS9  
COS8  
COS7  
COS6  
COS5  
COS4  
COS3  
COS2  
COS1  
COS0  
18  
-5.2V_A  
DV  
EE  
-5.2V_D  
HI5741  
L
1
-5.2V_D  
-5.2V_A  
10µH  
C0  
B10  
B9  
A10  
E11  
E9  
A2  
A1  
A0  
CS  
WR  
L
2
10µH  
K1  
H10  
B2  
V
V
PACI  
TICO  
CC  
CC  
K2  
J2  
OES  
OEC  
HSP45106  
FIGURE 27. PSK MODULATOR USING THE HI5741 AND HSP45106 16-BIT NCO  
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.  
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-  
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see web site www.intersil.com  
3-12  
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