HI5735
Absolute Maximum Ratings
Thermal Information
o
Digital Supply Voltage V
to DGND . . . . . . . . . . . . . . . . . . .+5.5V Thermal Resistance (Typical, Note 1)
θJA ( C/W)
CC
Negative Digital Supply Voltage DV to DGND . . . . . . . . . . . -5.5V
EE
Negative Analog Supply Voltage AV to AGND, ARTN . . . . . -5.5V
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature
Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 C
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C
55
70
EE
Digital Input Voltages (D11-D0, CLK) to DGND . . . . . DV
to -0.5V
CC
Internal Reference Output Current . . . . . . . . . . . . . . . . . . . . ±2.5mA
o
o
o
Voltage from CTRL IN to AV . . . . . . . . . . . . . . . . . . . . . 2.5V to 0V
EE
o
Control Amplifier Output Current . . . . . . . . . . . . . . . . . . . . . ±2.5mA
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300 C
(SOIC - Lead Tips Only)
Reference Input Voltage Range . . . . . . . . . . . . . . . . . -3.7V to AV
EE
Analog Output Current (I
OUT
) . . . . . . . . . . . . . . . . . . . . . . . . .30mA
Operating Conditions
Temperature Range
HI5735BIx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
o
o
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ is measured with the component mounted on an evaluation PC board in free air.
JA
Electrical Specifications AV , DV = -4.94 to -5.46V, V = +4.75 to +5.25V, V = Internal
REF
EE
EE
CC
o
T = 25 C for All Typical Values
A
HI5735BI
= 0 C TO 70 C
o
o
T
A
PARAMETER
SYSTEM PERFORMANCE
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Resolution
12
-
0.75
0.5
20
1
-
1.5
1.0
75
10
0.05
-
Bits
LSB
LSB
µA
Integral Linearity Error, INL
Differential Linearity Error, DNL
(Note 4) (“Best Fit” Straight Line)
-
(Note 4)
-
Offset Error, I
(Note 4)
-
OS
Full Scale Gain Error, FSE
Offset Drift Coefficient
(Notes 2, 4)
(Note 3)
-
%
o
-
-
-
µA/ C
Full Scale Output Current, I
20.48
-
mA
V
FS
Output Voltage Compliance Range
DYNAMIC CHARACTERISTICS
Throughput Rate
(Note 3)
(Note 5)
-1.25
0
80
-
-
-
-
MSPS
ns
Output Voltage Full Scale Step
To ±0.5 LSB Error Band R = 50Ω
20
L
Settling Time, t
SETT
Full Scale
(Note 3)
Single Glitch Area, GE (Peak)
Doublet Glitch Area, (Net)
Output Slew Rate
R
= 50Ω (Note 3)
-
-
-
5
3
-
-
-
pV-s
pV-s
V/µs
L
L
R
= 50Ω, DAC Operating in Latched Mode
1,000
(Note 3)
Output Rise Time
Output Fall Time
R
= 50Ω, DAC Operating in Latched Mode
-
-
675
470
-
-
ps
ps
L
(Note 3)
R
= 50Ω, DAC Operating in Latched Mode
L
(Note 3)
Differential Gain
R
R
= 50Ω (Note 3)
= 50Ω (Note 3)
-
-
0.15
0.07
-
-
%
L
L
Differential Phase
Deg
1623