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HI5740

更新时间： 2024-02-17 08:35:17
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11页 80K
描述
3V， Dual 10-Bit， 20/ 40/60 MSPS A/D Converter with Internal Voltage Reference (2 pages) FN4821

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HI5740 数据手册

 浏览型号HI5740的Datasheet PDF文件第2页浏览型号HI5740的Datasheet PDF文件第3页浏览型号HI5740的Datasheet PDF文件第4页浏览型号HI5740的Datasheet PDF文件第5页浏览型号HI5740的Datasheet PDF文件第6页浏览型号HI5740的Datasheet PDF文件第7页 
ISL5740  
TM  
Data Sheet  
June 2000  
File Number 4821.2  
PRELIMINARY  
3V Dual 10-Bit, 20/40/60MSPS A/D  
Features  
Converter with Internal Voltage Reference  
• Sampling Rate . . . . . . . . . . . . . . . . . . . . . .20/40/60MSPS  
The ISL5740 is a monolithic, dual 10-bit analog-to-digital  
converter fabricated in an advanced CMOS process. It is  
designed for high speed applications where integration,  
bandwidth and accuracy are essential. The ISL5740  
features a 9-stage pipeline architecture. The fully pipelined  
architecture and an innovative input stage enable the  
ISL5740 to accept a variety of input configurations, single-  
ended or fully differential. Only one external clock is  
necessary to drive both converters and an internal band-gap  
voltage reference is provided. This allows the system  
designer to realize an increased level of system integration  
resulting in decreased cost and power dissipation.  
• 9.1 Bits at f = 10MHz  
IN  
• Low Power at 60MSPS. . . . . . . . . . . . . . . . . . . . . .280mW  
• Power Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 6mW  
• Wide Full Power Input Bandwidth. . . . . . . . . . . . . 400MHz  
• SFDR at f = 10MHz. . . . . . . . . . . . . . . . . . . . . . . . .70dB  
IN  
• Excellent Channel-to-Channel Isolation . . . . . . . . . . .75dB  
• On-Chip Sample and Hold Amplifiers  
• Internal Bandgap Voltage Reference . . . . . . . . . . . . 1.25V  
• Single Supply Voltage Operation . . . . . . . . . .+2.7V - 3.6V  
• TTL/CMOS(3V) Digital Inputs CMOS Digital Outputs  
The ISL5740 has excellent dynamic performance while  
consuming less than 280mW power at 60MSPS. The A/D  
only requires a single +3.0V power supply. Data output  
latches are provided which present valid data to the output  
bus with a latency of 5 clock cycles.  
• Offset Binary or Two’s Complement Digital Data Output  
Format  
• Dual 10-Bit A/D Converters on a Monolithic Chip  
• Pin Compatible Upgrade to AD9288  
The ISL5740 is offered in 20MSPS, 40MSPS and 60MSPS  
sampling rates.  
Pinout  
• Wireless Local Loop  
Ordering Information  
• PSK and QAM I&Q Demodulators  
• Medical Imaging and Instrumentation  
• Wireless Communications Systems  
• Battery Powered Instruments  
TEMP.  
SAMPLIN  
G RATE  
PACKAGE PKG. NO. (MSPS)  
PART  
NUMBER  
RANGE  
o
( C)  
ISL5740/2IN  
ISL5740/3IN  
ISL5740/4IN  
ISL5740/6IN  
ISL5740 EVAL  
-40 to 85 48 Ld LQFP  
-40 to 85 48 Ld LQFP  
-40 to 85 48 Ld LQFP  
-40 to 85 48 Ld LQFP  
Q48.7x7  
Q48.7x7  
Q48.7x7  
Q48.7x7  
20  
30  
40  
60  
Pinout  
25  
Evaluation Platform  
48 47 46 45 44 43 42 41 40 39 38 37  
ID1  
ID0  
GND  
DV  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1
GND  
I
+
2
3
IN  
I
-
IN  
DFS  
4
5
CC  
GND  
AV  
IV  
RIN  
CC  
V
ROUT  
6
7
AV  
QV  
CC  
RIN  
S1  
GND  
DV  
8
CC  
S2  
9
GND  
QD0  
QD1  
Q
-
10  
IN  
Q
+
11  
12  
IN  
GND  
13 14 15 16 17 18 19 20 21 22 23 24  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000  
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