HI-518
Data Sheet
June 1999
File Number 3147.2
8-Channel/Differential 4-Channel, CMOS
High Speed Analog Multiplexer
Features
• Access Time (Typical) . . . . . . . . . . . . . . . . . . . . . . 130ns
• Settling Time . . . . . . . . . . . . . . . . . . . . . . . . 250ns (0.1%)
• Low Leakage (Typical)
The Hl-518 is a monolithic, dielectrically isolated, high
speed, high performance CMOS analog multiplexer. It offers
unique built-in channel selection decoding plus an inhibit
input for disabling all channels. The dual function of address
- I
- I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10pA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15pA
S(OFF)
D(OFF)
input A enables the Hl-518 to be user programmed either
2
as a single ended 8-Channel multiplexer by connecting ‘Out
• Low Capacitance (Max)
A’ to ‘Out B’ and using A as a digital address input, or as a
2
- C
- C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5pF
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10pF
S(OFF)
D(OFF)
4-Channel differential multiplexer by connecting A to the V-
2
supply. The substrate leakages and parasitic capacitances
are reduced substantially by using the Intersil Dielectric
Isolation process to achieve optimum performance in both
• Off Isolation at 500kHz . . . . . . . . . . . . . . . . . 45dB (Min)
• Low Charge Injection Error . . . . . . . . . . . . . . . . . . . 25mV
• Single Ended to Differential Selectable (SDS)
• Logic Level Selectable (LLS)
high and low level signal applications. The low output
o
leakage current (l
< 100pA at 25 C) and fast settling
D(OFF)
(t
= 800ns to 0.01%) characteristics of the device
SETTLE
make it an ideal choice for high speed data acquisition
systems, precision instrumentation, and industrial process
control.
Applications
• Data Acquisition Systems
• Precision Instrumentation
• Industrial Control
Ordering Information
TEMP.
PKG.
NO.
o
PART NUMBER RANGE ( C)
PACKAGE
18 Ld PDIP
18 Ld CERDIP
Pinout
HI3-0518-5
HI1-0518-5
HI1-0518-8
0 to 75
0 to 75
E18.3
HI-518 (CERDIP, PDIP)
F18.3
F18.3
TOP VIEW
-55 to 125 18 Ld CERDIP
1
2
3
4
5
6
7
8
9
18
17
V+
OUT B
IN8/4B
IN7/3B
IN6/2B
IN5/1B
GND
OUT A
V-
16 IN4/4A
15 IN3/3A
14 IN2/2A
13 IN1/1A
12
11
10
ENABLE
V
/LLS
A
0
DD
A /SDS
A
1
2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
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