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HI-8040QT PDF预览

HI-8040QT

更新时间: 2024-11-11 22:51:19
品牌 Logo 应用领域
HOLTIC 显示驱动器驱动程序和接口接口集成电路高压
页数 文件大小 规格书
6页 704K
描述
CMOS HIGH VOLTAGE DISPLAY DRIVER

HI-8040QT 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:QFP
包装说明:QFP,针数:100
Reach Compliance Code:compliantECCN代码:7A994
HTS代码:8542.39.00.01风险等级:5.15
Is Samacsys:N数据输入模式:SERIAL
显示模式:DOT MATRIX接口集成电路类型:LIQUID CRYSTAL DISPLAY DRIVER
JESD-30 代码:R-CQFP-G100JESD-609代码:e0
长度:20 mm复用显示功能:NO
标称负供电电压:-21.5 V功能数量:1
区段数:85端子数量:100
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QFP
封装形状:RECTANGULAR封装形式:FLATPACK
峰值回流温度(摄氏度):225认证状态:Not Qualified
座面最大高度:4.318 mm最大供电电压:7 V
最小供电电压:3 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:14 mm最小 fmax:4 MHz
Base Number Matches:1

HI-8040QT 数据手册

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HI-8040  
September 1999  
GENERAL DESCRIPTION  
APPLICATIONS  
The HI-8040 is a CMOS integrated circuit designed for high  
voltage LCD display drive applications. It can drive 85  
segments at voltages between +5 and -30 volts. An optional  
negative converter can generate the negative display drive  
voltage. Test inputs facilitate opens and shorts testing. The  
backplane frequency is checked and, as long as power is  
available, the segments are shut "Off" if the frequency  
becomes too low.  
! Dichroic Liquid Crystal Displays  
! Standard Liquid Crystal Displays  
PIN CONFIGURATION (Top View)  
The HI-8040 is part of a family of display drivers which  
control segment information in the same way. Data is  
serially clocked into the device and the data for all segment  
outputs are latched in parallel when the Load input  
transitions from high to low. With the Data Out from the shift  
register available, devices may be cascaded to obtain more  
segment outputs. The shift register is 85 bits long.  
S60  
S61  
S62  
S63  
S64  
S65  
S66  
S67  
S68  
S69  
S70  
S71  
S72  
S73  
S74  
S75  
S76  
S77  
S78  
S79  
81  
82  
83  
84  
85  
86  
87  
88  
89  
90  
91  
92  
93  
94  
95  
96  
97  
98  
99  
100  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
S29  
S28  
S27  
S26  
S25  
S24  
S23  
S22  
S21  
S20  
S19  
S18  
S17  
S16  
S15  
S14  
S13  
S12  
S11  
S10  
100 PIN QUAD CERPACK  
The die is metal mask programmable to provide for various  
package and/or cascade tap options. Consult your Holt  
Sales representative to explore the possibilities.  
See page 3-19 for magnified view  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
! 4 MHz serial input data rate  
! 85 segment outputs  
DIN  
DATA IN  
85 Stage  
Shift Register  
DOUT  
85  
CL ⇒  
CLK  
! Cascadable  
CS ⇒  
! 5 Volt inputs translated to 35 Volts  
LE  
85 Bit Latch  
! T est pins allow hardware all "ON", all "OFF" or  
alternating  
LD ⇒  
Oscillator  
Divider  
BPOSC ⇒  
Voltage  
! Monitors backplane oscillation and forces all  
segments to "OFF" condition if below 10Hz  
BPIN ⇒  
Translators  
Voltage  
Translator  
High Voltage  
Drivers  
! Negative voltage converter available on-chip  
! CMOS low power  
High Voltage  
Buffer  
! Military processing available  
BP  
85 SEGMENTS  
HOLT INTEGRATED CIRCUITS  
3-15  
(DS8040 Rev. NEW)  
9/99  

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