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HI-3282CLT PDF预览

HI-3282CLT

更新时间: 2024-11-16 04:21:43
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页数 文件大小 规格书
13页 146K
描述
ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER

HI-3282CLT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:LCC
包装说明:QCCN, LCC44,.65SQ针数:44
Reach Compliance Code:compliantECCN代码:7A994
HTS代码:8542.39.00.01风险等级:5.74
地址总线宽度:边界扫描:NO
最大时钟频率:1 MHz通信协议:SYNC, BYTE
数据编码/解码方法:NRZ最大数据传输速率:0.01220703125 MBps
外部数据总线宽度:16JESD-30 代码:S-CQCC-N44
JESD-609代码:e4长度:16.535 mm
低功率模式:YES串行 I/O 数:2
端子数量:44最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装等效代码:LCC44,.65SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):245电源:5 V
认证状态:Not Qualified座面最大高度:3.047 mm
子类别:Serial IO/Communication Controllers最大压摆率:10 mA
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Gold (Au)端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:16.535 mm
uPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, SERIALBase Number Matches:1

HI-3282CLT 数据手册

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HI-3282  
ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER  
February 2006  
GENERALDESCRIPTION  
FEATURES  
! ARINC specification 429 compatible  
The HI-3282 is a silicon gate CMOS device for interfacing  
the ARINC 429 serial data bus to a 16-bit parallel data bus.  
Two receivers and an independent transmitter are  
provided. The receiver input circuitry and logic are  
designed to meet theARINC 429 specifications for loading,  
level detection, timing, and protocol. The ARINC inputs of  
the HI-3282-10 configurations also have internal lightning  
protection to DO-160D, Level 3. The transmitter section  
provides the ARINC 429 communication protocol. An  
externalARINC 429 Line Driver such as the Holt HI-3182 or  
HI-8585 is required to translate the 5 volt logic outputs to  
ARINC 429 drive levels.  
! Compatible with Industry-standard alternate  
parts  
! Small footprint 44-pin PQFP package option  
! 16-Bit parallel data bus  
! Direct receiver interface to ARINC bus  
! Internal Lightning Protection of ARINC inputs  
per DO-160D, Level 3 in -10 configurations  
! Timing control 10 times the data rate  
! Selectable data clocks  
The 16-bit parallel data bus exchanges the 32-bit ARINC  
data word in two steps when either loading the transmitter  
or interrogating the receivers. The data bus interfaces with  
CMOS andTTL.  
! Automatic transmitter data timing  
! Self test mode  
! Parity functions  
! Low power, single 5 volt supply  
! Industrial & full military temperature ranges  
Timing of all the circuitry begins with the master clock input,  
CLK. For ARINC 429 applications, the master clock  
frequency is 1 MHz.  
Each independent receiver monitors the data stream with a  
sampling rate 10 times the data rate. The sampling rate is  
software selectable at either 1MHz or 125KHz. The results  
of a parity check are available as the 32ndARINC bit.  
PIN CONFIGURATION (Top View)  
The transmitter has a First In, First Out (FIFO) memory to  
store 8ARINC words for transmission. The data rate of the  
transmitter is software selectable by dividing the master  
clock, CLK, by either 10 or 80. The master clock is used to  
set the timing of theARINC transmission within the required  
resolution.  
N/C - 1  
D/R1 - 2  
D/R2 - 3  
SEL - 4  
EN1 - 5  
EN2 - 6  
BD15 - 7  
BD14 - 8  
BD13 - 9  
BD12 - 10  
BD11 - 11  
33 - N/C  
32 - N/C  
31 - CWSTRX  
30 - ENTX  
29 - 429DO  
28 -429DO  
27 - TX/R  
26 - PL2  
25 - PL1  
24 - BD00  
23 - BD01  
HI-3282PQI  
HI-3282PQI-10  
HI-3282PQT  
&
APPLICATIONS  
HI-3282PQT-10  
! Avionics data communication  
! Serial to parallel conversion  
! Parallel to serial conversion  
44-Pin Plastic Quad Flat Pack (PQFP)  
(See page 10 for additional pin configurations)  
HOLT INTEGRATED CIRCUITS  
www.holtic.com  
(DS3282 Rev. I)  
02/06  

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